Font Size: a A A

Design And Implementation Of Date-Driven Readout For Monolithic Active Pixel Sensors For ALICE ITS

Posted on:2016-08-27Degree:DoctorType:Dissertation
Country:ChinaCandidate:P YangFull Text:PDF
GTID:1108330464473866Subject:Radio Physics
Abstract/Summary:PDF Full Text Request
ALICE (A Large Ion Collider Experiment) is designed to address the physics of strongly interacting matter at the LHC, in particular to study the properties of the Quark-Gluon Plasma (QGP). The ITS (Inner Tracking System) is the closest detector to the interaction point and its inner most two layers are equipped with silicon hybrid pixel sensors of the current detector. The upgrade of the ITS aims to have a high granularity to improve the standalone tracking efficiency at low pT, a reduction of the power consumption to decrease the material budget, a reduction of the integration time to decrease the pile-up probabilities and a fast readout.CMOS Monolithic Active Pixel Sensors (MAPS) which integrate the sensor and the readout circuitry in one single silicon die offer significant cost advantages while achieving good position resolution and low material budget. Because the radiation tolerance (TID radiation hardness of 700 krad and NIEL radiation hardness of 10131 MeV neq/cm2) requirements of ALICE are moderate, the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with a power supply of 1.8 V has been chosen, based on wafers with a high resistivity (p> 1 kΩ·cm) and changeable thicknesses of the epitaxial layer (18 μm-40 μm). The gate oxide of this technology is 3 nm, which gives better transistor radiation tolerance. A deep p-well is provided to shield n-wells with PMOS transistors from the epitaxial layer and allows full CMOS within the pixel. The radiation tolerance of this technology and the collection electrode structure have been verified and optimized by the Explorer prototypes showing very promising results. The detection efficiency is close to 100% using a 5 σ threshold with a reverse substrate biasTo achieve a position resolution of 5 μm for the inner layers of the detector, a power consumption and an integration time by an order of magnitude below the chip design specifications, two different readout architectures have been studied and implemented. A low power front-end (~40 nW/pixel) has been designed for these two different architectures. Both of which are alternatives to the traditional rolling shutter architecture. One of them is the OrthoPix architecture, where a pixel array with a pixel pitch of 10 μm has been implemented. Four projections have been implemented using column or projection level discriminators. The efficiency of this reconstruction method is up to 99.9% in the condition that the hit rate is 40 hits/cm2 with a pixel array of 255 x 255. The reduction of the number of signals in the case of an N×N pixel matrix and 4 projections from N2 to 4×N. can reduce power consumption effectively. The other architecture, is composed of an in- pixel binary front-end combined with a hit-driven architecture and was implemented using a pixel pitch of 28 μm. Contrary to the rolling shutter architecture, the readout time is decoupled from the integration time, and is a function of the frame occupancy. The charge threshold of the front-end is adjustable by using the on-chip DACs. The AERD data-driven readout architecture of ALPIDE operates the address encoding and reset decoding based on an arbitration tree, and allows to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in MAPS, AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. Several prototypes have been fabricated and some of them have been tested with X-ray sources and particles in a beam showing very promising results. Thanks to the intrinsic zero-suppression technique of AERD readout, this first large scale prototype pALPIDEfs demonstrated an integration time below 10 μs and perspectives for a power density below 40 mW/cm2.This project was the effort of many people. I contributed to this work with the design of the AERD and a first prototype matrix implementing the OrthoPix architecture. Also some work was carried out to study a bipolar transistor as a sensor element with intrinsic amplification of the signal charge.
Keywords/Search Tags:A Large Ion Collider Experiment (ALICE), pixel chip readout, MAPS, zero-suppression, data-driven, low power, tracker system
PDF Full Text Request
Related items