The Design And Integration Of Digital Peripheral Subsystem Based On C8051F Micro-controller

With the development of micro-electronic technology, the micro-controller industry is developing at an amazing speed. From the initial 4-bit to the present 64-bit, the micro-controller has a qualitative improvement in area, speed and stability. Nevertheless, the 8-bit micro-controller is still used in some specific applications due to the huge advantages of area and power consumption. In the field of 8-bit micro-controller, C8051 F series is an outstanding representative. Having great advantages in miniaturization, stability and compatibility, C8051 F is widely used in the field of measurement, control, instrumentation, automation, intelligent interface and so on. With the increase of the complexity of actual application siceniaor, micro-controller need to set up the communication with much more external devices. The digital peripheral subsystem of the micro-controller could provide powerful peripheral resource to guarantee the operation flexibility and expansibility. How to design the digital peripheral subsystem is one of the key problem in MCU's research and development.This topic comes from a research project of national ministry. A micro-controller is needed to control working mode of a signal processor in the board level system and provides some communication interface for data transmission with external devices. Although there are some mature products in the field of micro-controller, self-research is required in this project due to the demands of flexibility and expansion.In this thesis, according to the functional requirements of the digital peripheral components in the C8051 F chip, the digital peripherals are divided into several modules. This thesis elaborate the design of the C8051 F MCU digital peripherals subsystem in RTL level, which includes UART, SPI, SMBus, Timer/Counter, PCA, Crossbar and the SFR bus.The micro-controller core and the peripheral system are integrated and debugged in FPGA. A detailed verification plan is formulated and a verification platform is built. The Zedboard FPGA board, which is based on Zynq-7000 series, is used in the prototype verfication. The micro-controller system of the IP core is downloaded to the FPGA. The maximum operation frequency could reach 104 MHz. In the FPGA platform, some C application programs are emulated, including the calculation of the complex mathematical functions, the LED rotation, the generation of PWM waves, FFT computation and so on. All the applications could realize the right result that compared with the expected results. In FFT computation, the code coverage is above 71%. The verification shows that the IP core of micro-controller can achieve the designed expectations and meet the project requirements.