Study On Verification Technology Of USB2.0 HOST Interface Of SoC Communication Chip

With the rapid development of communication industry and the popularity of smart phones,chip communication system chips,namely communication SoC,have attracted much attention.In the rapid development of integrated circuit chips,the communication SoC design method based on integrated circuit IP core has become the mainstream,so the design and verification of IP core becomes very important.Verification is a very important link in the design process of IC.The design of SoC is closely related to the quality of the verification work.Verification provides an effective guarantee for the design of SoC.IP verification and performance testing have tended to be important factors.Combined with practical engineering projects,functional verification plays a key role in the chip design process.As a simple and easy to use and high-speed serial bus,universal serial bus USB has been more and more popular since its appearance.In addition to all the on-chip bus specifications,the advanced microcontroller bus architecture AMBA has gradually become an on-chip communication standard.Therefore,this paper combines USB technology with AMBA bus to carry out functional verification of USB2.0 HOST interface IP core.The main contents of this paper are:first,formulate a scheme for verifying the USB HOST interface,accurately specify the initialization vector of the USB HOST interface controller,and extract detailed verification function points.Secondly,a software-hardware co-verification method is used to build a configurable,universal,and reusable virtual verification platform,which includes a module-level and system-level verification platform.According to the USB2.0 HOST protocol specification,first this paper proposes a new module level verification platform architecture.In order to reduce integration and facilitate simulation test,the written AHB bus interface is separated from the task of UTMI+interface,and GPIO is used to establish communication between the two parts.Through GPIO,the AHB bus interface can make an orderly call to the task on the UTMI+ interface to complete the test,in order to complete an effective transmission.The architecture is independent of the function of each module when the module is divided,and the signal flow is clear.Secondly,I propose a new system level verification platform architecture.Two groups of USB controllers are connected,one is USB HOST controller,the other is used for USB DEVICE controller,and two USB controllers establish communication through the UTMI+ output interface.This architecture can be easily redesigned according to specific applications for testing.Using Cadence's simulation tool named NC-Sim,loads the corresponding interfaces that need to be observed.The signal completes the fast dynamic simulation of the USB HOST controller interface.It is verified that the USB2.0 HOST IP core has perfect functions,and can support two transmission modes of high speed(480Mbps)and full speed(12Mbps).Thirdly,aiming at the shortcomings of the virtual verification platform,a SoC prototype verification platform scheme based on Xilinx FPGA and ARM processor is built.Through structure C language test items to verify the functional correctness,the board-level test results are given.The results show that the USB2.0 HOST interface can work normally,and successfully completed the enumeration process of the USB device to achieve the required transmission specifications,in line with the basic characteristics of USB2.0,with a certain degree of practicality and scalability,so as to accumulate valuable experience in verification technology for me.