Prototype Verification Of SoC Chip IP Subsystem Based On FPGA

Due to the multiplexing of large-scale IP(Intellectual Property)cores in SoC(System on Chip),the chip architecture becomes complex and the chip verification becomes difficult.It is of great important significance to research the chip verification technology.At the present,the software simulation which is performed in an ideal environment is commonly used in chip verification.However,this method is difficult to find some hidden problems such as circuit delays.The Field-Programmable Gate Array(FPGA)prototype verification is a software and hardware co-verification technology which is closer to the real hardware environment of the chip and can quickly find out the hidden problems in the chip.Therefore,more chip manufacturers perform FPGA prototype verification before chip tapeout to increase the success rate of tapeout.This paper is based on the satellite terminal baseband SoC chip which is developed by the Institute of Computing Technology,Chinese Academy of Sciences(ICT,CAS).The main work is of that using FPGA prototype verification technology to perform functional verification of SOC IP subsystem,including the following three aspects:1.Transplantation of ASIC(Application Specific Integrated Circuit)code to FPGA codeBecause of the physical circuit structure of the ASIC environment and the FPGA environment is different,the code modification in the ASIC environment needs to be replaced with the code in the FPGA environment when using the FPGA prototype verification technology.2.Functional simulation verification of SoC IP subsystem based on FPGAAccording to the architecture features of the SoC IP subsystem,the simulation verification environment is built,and the automatic compiling of the project is performed by using the Makefile script which improves the verification efficiency.The FPGA functional verification of each module of the IP subsystem is performed,and the design and implementation of test vectors for various modules in the verification process are mainly studied.3.FPGA board verification of the IP subsystemThe StarFire-DC820 FPGA verification board is used to build an FPGA prototype verification platform,In order to improve the overall implementation efficiency in the process of implementing the FPGA prototype verification,the TCL script configuration simulation tool is used to automatically execute the entire integrated implementation process,instead of the GUI implementing the synthesize,translation,mapping,placement and routing work of the project code,and restoring the IP subsystem application scenarios such as voice playback and recording scene.