| With the growing scale of integrated circuits,the innovation of testing technology is urgent.In order to reduce the yield problem in chip production,testability design is introduced into chip testing,among which scan chain technology is the most widely used.Although the introduction of scan chain technology improves the reliability of the test,on the other hand,it also provides the path for the attacker to invade the chip,which greatly reduces the security.In previous studies,the circuit was protected at the key generation stage and key transmission stage respectively,but there are risks of attack at these two stages.Therefore,this design mainly combines the protection at the two stages and simultaneously protects at the key generation stage and key transmission stage.In this work,by analyzing the attack types and protection methods of the current encryption chip,a new encryption testing technology based on ring oscillator PUF is proposed to protect the chip during the key generation stage and the key transmission stage respectively.This design mainly includes encryption algorithm key generation technology,key transmission process scan chain access technology and dynamic security scan chain technology.The key generation technology of encryption algorithm mainly consists of self-reference ring oscillator PUF module,control module and counting module.The control module controls the self-reference ring oscillator PUF and the start of the counting module.The self-reference ring oscillator PUF generates the corresponding oscillation frequency of different chips.The counting module generates the binary number by counting the oscillation frequency,which can be used as the unique authentication fingerprint of the chip and can be used as the initial key in the AES encryption chip.The scan chain access technology in key transmission process mainly includes test vector input and decision module and linear feedback shift register.The test vector input and decision module is mainly to analyze the type of attack,so that the test vector entering the scan chain is the correct test vector or the xor value of the correct test vector and the pseudo-random vector generated by the linear feedback shift register,so as to carry out the interference of the test vector outside the scan chain,so as to achieve the purpose of protection.Dynamic security scan chain technology mainly includes secure scan chain module.By adding XOR gate and inverter to the output end of the scan register,the output path increases.When the test vector enters the scan chain,the scan chain changes,making the attacker observe the wrong response at the output end of the scan chain.Under the combination of the three technologies,no matter in the key generation stage or the key transmission stage,the attacker’s attack on the chip will be dealt with by the corresponding protection means,which greatly improves the security of the chip.Through the experimental analysis of each module of the encryption test technology based on ring oscillator PUF,compared with the traditional single protection in the key generation stage or in the key transmission stage of low security problems,the encryption test circuit based on ring oscillator PUF can further prevent the disclosure of encrypted information.The difficulty of cracking the whole circuit is increased by at least 1.6*10231 times.The area of the chip only increase less than 1%. |