Research On Acceleration Method Of Spiking Neural Network Based On FPGA

Spiking Neural Networks(SNN)is the third generation of neural networks.Its working mechanism is closer to the biological nervous system.It imitates the pulse mechanism of neurons and only calculates neurons when new input pulse spikes arrive.Therefore,It can effectively implement energy-saving mode on hardware devices,and the complex topology of connections and reverse connections in the SNN layer has the potential to solve complex problems and real-time applications.However,network simulation in brain-inspired computing is accompanied by a large number of serial updates of neurons and synapses based on complex floating-point calculations.Therefore,the simulation of brain-inspired computing generally has the problems of slow processing speed and high power consumption.Regarding this issue,this article first conducts a quantitative experimental study on different numerical solution methods for the neuron update equation,finds the best solution method through analysis,and uses bit-width compression to customize the parameter of the SNN network.Then,on this basis,a custom computing method based on FPGA is designed,and finally this method is applied to an accelerator system for simulating a pulse neural network under the NEST framework.The specific research content is as follows:First,complete the quantitative research and analysis of SNN.The quantitative research on SNN is mainly divided into three parts.The first part is the lightweight research of the SNN network model.First,it reviews the common optimization network topology and bit width compression methods of convolutional neural network(CNN),and based on This paper proposes a mixed-precision quantization method for bioinspired SNNs.The second part is to analyze the calculation-intensive points of SNN simulation by quantitatively analyzing the load of the brain-inspired simulator NEST.The last part is to compare the quantitative experimental results of different numerical solution methods of different neuron update equations,and choose Izhikevich neurons,which are relatively simple in calculation and have diverse biological performance,as the main research object in the follow-up.Second,complete the FPGA-based custom computing acceleration method design.After Izhikevich was selected as the quantified research object,the parameters of the membrane potential update equation solved by the forward Euler method were quantified with mixed precision to reduce memory resource overhead and improve computational efficiency.Then,based on the FPGA platform,complete the design of the customizable flow structure of Izhikevich neurons,optimize the membrane potential update of a single neuron by means of balanced data paths,and accelerate the membrane potential update of the overall neuron by using data rearrangement and parallel pipeline technology.Finally,through software simulation experiments,the performance of the customized calculation method on different parallelism and different FPGA platforms is compared to determine the best design scheme.Third,implement a hardware acceleration emulator system based on the NEST open source framework.Complete the design of the high-speed interactive interface for general software and hardware data,and optimize the data transmission between ARM and FPGA by optimizing memory allocation,reducing the total amount of data transmission,and reducing the number of communication startups.The final experimental results show that compared with the i7-10700 CPU,the classic lateral geniculate nucleus network model and the liquid state machine model on the ZCU102 have improved computing performance by 2.26 and 3.02 times in the neuron update part,and the energy efficiency ratio of the update part has increased by 8.06 and 10.8 times.