0.15μm GaAs PHEMT Process PDK And Model Library Technology Research

With the increasing demands for RF integrated circuit design and expanding application scenarios,it is essential to optimize and coordinate semiconductor process and circuit design to ensure that the designed chip can achieve the intended functions.Process Design Kits(Process Design Kit,PDK),as the interface between the two,can help build efficient communication bridges between designers and manufacturers,provide necessary tools for IC design,and are a crucial link in IC design and manufacture.The development of integrated circuits and Electronic Design Automation(EDA)is a bottleneck issue in China,and PDK,as a bridge between IC design and EDA tools,can promote mutual development between the two.However,there are still insufficient research and development on PDK technology in China.On the one hand,commercial PDKs contain Intellectual Property(IP)and semiconductor process information from wafer foundries,which are non-editable to users.On the other hand,PDK are developed using EDA-specialized script languages,which lack portability,meaning they cannot be used in different EDA tools,which greatly limits the development of domestic EDA tools.In addition,as the semiconductor process evolves continuously,design rules become more complex,and higher requirements for PDK development arise.PDK quality verification results are important for chip performance,and an exceptional PDK can reduce errors during the design and manufacture process.To address these problems,the following work and innovations are presented in this thesis:(1)The working principles and functions of each component in PDK are detailed,and PDK application environments and the development methods under different EDA tools are analyzed.To overcome their limitations,a PDK development method using graphical editors and open-source Tcl and Python script languages is proposed.Compared with SKILL and AEL programming,the PDK development method proposed in this thesis not only has higher development efficiency but can also achieve inter-operability between different EDA tools,and the developed PDK can be called in domestic EDA tools.(2)By using the PDK development method proposed in this thesis,a complete set of PDK development and model library establishment for a 0.15μm Ga As p HEMT process of a domestic foundry has been accomplished with the domestic EDA platform(Empyrean Aether MW,Aether Micro Wave).This includes device component description format,technical files,Parameterized Cell,Physical Verification DRC,and LVS development.The development steps and precautions in actual engineering applications are given in detail.By using Tcl to code callback functions and linking various CDF parameters together,the problem of CDF parameter input values not complying with process limits has been resolved,which realizes 36 Pcell(Parameteried cell)units for nine device types,including Enhanced/Depleted HEMT,Single/double/triple/quadruple gate switching devices,Diodes,MIM/Stack Capacitors,Thin Film Resistors,Circular/square Inductors,Various transmission lines,Solder pads,and back holes.The establishment of model libraries(HEMT,resistor,inductor,capacitor,transmission line)in PDK is studied,and the models are established under this process and integrated into the PDK of this thesis for simulation design using EDA software.(3)In PDK verification,the traditional Quality Assurance method usually requires testers to assign values to CDF parameters manually and establish relevant tests.However,test cases are difficult to cover all device structures,and they are very timeconsuming,which increases the design cycle.To resolve this,this thesis proposes a PDK quality checking method that uses a script program to build test cases automatically,which considers more Pcell structures to make the verification results representative and accurate while also improving efficiency.After PDK quality checking,the 0.15μm Ga As p HEMT PDK is used in domestic EDA tools for circuit design and simulation verification,and the schematic and layout design and verification of a common source/common gate single-stage low-noise amplifier have been accomplished on a Hua Da Jiu Tian Aether MW platform.The results show that the PDK developed in this thesis can be seamlessly connected with domestic EDA tools.In addition,the same process ADS PDK has also been developed in this thesis,and the design and simulation of the above circuits have been completed in ADS.Comparison with the simulation results in Aether MW indicates the accuracy of the PDK and model library development in this thesis.