Deep Learning-based Modeling Of 3D Integrated Circuit Through Silicon Vias And Dummy Metal Fills Equivalence Techniques

With the development of the integrated circuit industry,the feature size of transistors has been decreasing,and integrated circuits have entered the post-Moore era.Three-dimensional integrated circuits(3D ICs)based on through silicon vias(TSVs)have continued the development of Moore’s law by using TSVs to achieve interlayer interconnection between the upper and lower layers of chips.The modelling of TSVs has been a popular research direction since then due to the specificity of the TSV structure.In this paper,we first propose an efficient broadband through silicon vias(TSVs)modelling method based on deep learning and use it to design a compact three-dimensional(3D)spiral inductor.By comparing different activation and loss functions,an adaptive deep neural network(DNN)TSV model(DNN-TSV model)based on Gaussian error linear unit(GELU)and Huber loss function is proposed.This model has higher accuracy and better robustness over a wider frequency band than the conventional circuit equivalent model.Moreover,a compact three-dimensional spiral inductor with ground TSV is designed based on the DNN-TSV model.Compared with planar inductors,this3 D inductor greatly reduces the occupied area and reduces the crosstalk between TSV pairs.The designed inductor is simulated by direct electromagnetic(EM)calculations to verify the effectiveness of the proposed method.In addition,with the increasing integration of integrated circuits and the increasing size of silicon wafers,the requirement for flattening of the silicon wafer surface has reached the nanometer level.Chemical mechanical polishing(CMP)is widely used in ICs as the only process that can achieve global and local flattening on the silicon wafer surface and is also a key step in the TSV process.In order to meet the CMP process requirements and achieve a uniform metal density,it is necessary to add Dummy Metal Filling(DMF)to areas with low metal density,however DMF introduces extra parasitic effects that can seriously affect signal integrity and increase the computational resource consumption of electromagnetic simulations.For the DMF effect,a deep learning-based EM analysis method for on-chip inductors containing dummy metal fillings is proposed.By comparing different activation and loss functions,a deep neural network model with the best convergence is established using a smooth maximum smooth unit(SMU)activation function and a log-cosine(log-cosh)loss function.The parasitic capacitance effect introduced by the DMF can be quickly and accurately extracted using this model,and the DMF can also be equated to the effective dielectric constant of the surrounding medium,avoiding the timeconsuming EM simulation.An on-chip inductor with different DMF filling densities is analyzed using this method and compared with the EM simulation results of the whole structure.The results validate the accuracy and effectiveness of the proposed method.