| With the development of communication technology,the requirements for high-power radio frequency power amplifiers are becoming higher and higher.As an important component of the RF system,the performance of the power amplifier affects the communication quality of the entire system.In the early days,high-power transmitters used large,bulky vacuum tube devices.With the development of the times,solid-state transmitters gradually replaced vacuum tube transmitters and became the mainstream solution for RF transmitters.In solid-state transmitters,frequently-used device materials include silicon,gallium arsenide,gallium nitride,and silicon germanium.Among them,gallium nitride devices have high withstand voltage and high power density characteristics,which can meet the requirements of power amplifiers for high power and high efficiency.This dissertation describes a internally matched power amplifier working in the C-band.In the design with gallium nitride HEMT,the zero-bias cold FET method and the positive-bias cold FET method are used to extract the intrinsic and parasitic parameters of the transistor.The transistor uses a 13-parameter small-signal model.This power amplifier requires an output of over 50 d Bm at an input power of 23 d Bm.To achieve a high gain of 27 d B,this power amplifier adopts a three-stage structure.The final stage adopts the structure of a Class J power amplifier,making the second harmonic and fundamental wave have a certain phase ratio relationship,thereby effectively reducing the overlap of the transistor voltage and current waveforms and improving efficiency.The two-way power synthesis scheme is adopted to effectively increase the output power.Gallium arsenide integrated passive devices are used to design the matching circuit,which can effectively reduce the production cost.An alumina ceramic circuit is used to design the power combiner,reducing the synthesis loss.The interstage matching circuit adopts a band-pass matching circuit structure,matching the output impedance of the previous transistor to the input impedance of the next transistor with a stability loss network to ensure system stability.The input matching circuit adds an equalizer to ensure the overall power flatness of the system.The bias adopts a tree-shaped bias network.To reduce the stability risk,a small resistor is connected in series for the leakage of the pre-stage power amplifier to ensure the stability of the bias network.The resistance value does not exceed 1Ω,minimizing the impact of the resistance on the amplifier gain.The entire chip is assembled in a 12×12mm area on a high thermal conductivity molybdenum copper substrate,achieving miniaturization.The internally matched power amplifier is assembled and adjusted with micro-assembly technology.Among them,the chip testing adopts an automated test system to perform pulse large-signal testing and small-signal testing of the power amplifier.The measure results show that its output power reaches 50.5d Bm,the power-added efficiency reaches 50%,the power gain reaches 27.5d B,and the input standing wave ratio is less than 1.5,which is basically consistent with the simulated performance.It has broad application prospects in satellite communication,base stations,radar,and other fields. |
