| The Radio Determination Satellite System(RDSS)of China’s Beidou satellite navigation system(BDS)is one of the unique features that sets it apart from other satellite navigation systems.It has high requirements for communication distance,power consumption and signal quality of the terminal.This also requires the power amplifier,the core device in communication systems,to have high output power,efficiency,and high linearity.Therefore,it can be seen that the research on high-power,high-efficiency,and linearized RDSS power amplifier chips has important engineering application value.Based on the InGaP/GaAsHBT MMIC technology and LGA packaging technology,a power amplifier chip is developed in this thesis that achieves 3 W and 5 W output power under different operating voltages for the RDSS function of BDS.This PA chip has high output power,efficiency,and linearity which has a gigh engineering application value.The main research work of the thesis is as follows:1.Based on the ADS simulation platform,the circuit and layout design of the3W/5W RDSS PA chip(MMIC DIE)was implemented,including a three-stage amplification circuits of the MMIC DIE,temperature insensitive adaptive bias circuits,partial matching circuits of each stage,power detection circuit,and ESD electrostatic protection circuit.This temperature insensitive adaptive linearization bias circuit is designed based on a current mirror structure,whose temperature and power characteristics simulation results show that this power amplifier chip maintains high stability as the temperature and input power increase,effectively solving the problem of DC bias point change and improving the linearity of the power amplifier;2.Based on ADS and HFSS simulation platforms,3W/5W RDSS PA chip LGAPCB substrate circuit,layout and packaging design have been implemented.Inside a 6mm × 4mm × 1 mm packaging size,the PA’s partial matching circuits pf each stage and its input,output matching circuits are designed.The output matching circuit adopts a Class F architecture,achieving control of second,third,and fifth harmonics.The simulation results of harmonic performance show that within the input power range of-30～0 d Bm,the Class F output matching circuit has a suppression ratio of less than-60 d Bc for second,third,and fifth harmonics,which improves the PAE of the power amplifier chip and reaches the industry’s advanced level.The power detection circuit designed in conjunction with MMIC DIE achieves a detection resolution of 1 d Bm/1 m V at an input power of-25 d Bm.3.Multiple simulation platforms are used to jointly simulate and optimize the3W/5W RDSS power amplifier chip,including the Momentum simulation platform based on ADS for electromagnetic characteristics simulation of the MMIC DIE power amplifier chip,the HFSS simulation platform for electromagnetic characteristics simulation of the LGAPCB and packaging.Based on the electromagnetic characteristics simulation results of the first two platforms,the PA chip(MMIC DIE + packaging)was jointly simulated on the ADS platform,and the results showed that when the power supply voltage was3.5V@1.625 At GHz,the gain is greater than 37.1 d B,and the 1 d B gain compression point output power reaches 35.1 d Bm with PAE greater than 42%,and the saturated output power reaches 36 d Bm with PAE greater than 43%,its input standing wave ratio VSMR<1:1.26,and output standing wave ratio VSMR<1:1.68.At the supply voltage of5V@1.625 At GHz,the gain is greater than 38.5 d B,P1 d B reaches 37.5 d Bm,PAE is greater than 41%,and Psat reaches 38.2 d Bm,PAE is greater than 42%,input standing wave ratio VSMR<1:1.26,and output standing wave ratio VSMR<1:1.71.The simulation results show that the chip has achieved the output requirements of 3 W and 5 W under different power supply voltages,and has high efficiency and good linearity;Meanwhile,this article simulates the overall temperature characteristics of the power amplifier based on the ANSYS platform.The simulation results show that at room temperature,when the power amplifier P1 d B reaches 3 W output,the highest junction temperature of the power amplifier is 141.19 ℃.When the power amplifier P1 d B reaches 5 W output,the highest junction temperature of the power amplifier is 198.8 ℃.The simulation results show that the chip is within the safe operating temperature range of HBT,proving that the 3W/5W RDSS power amplifier chip designed in this thesis has temperature reliability. |
PDF Full Text Request