Multispectral Pixel Level Fusion Detector Research On Key Technologies Of Readout Circuit

Compared with traditional detectors,fusion detectors provide more detailed information for target tracking and identification.Existing multispectral detectors mainly use multiple optical systems to beam-split and image the target,and then fuse the images.However,it is difficult to achieve temporal and spatial registration of the images because the visible light imaging detector and the infrared imaging detector are separately processed and then fused.Therefore,the thesis designs an imaging scheme for infrared/visible light pixel-level fusion detection.The fusion detector includes highabsorption detection pixels and low-power pixel-level readout circuits,the thesis focuses on the following aspects,including the area limitation of pixel-level readout circuits,the difficulty in directly extracting analog voltage,and the storage pressure of on-chip readout:(1)Design of readout circuit unit structureThe multispectral detection model is analyzed,and the fusion detection pixel sizes are determined to be 12μm and 9μm,respectively,with readout circuit array sizes of320×240 and 640×480.To solve the problem of limited area,a 2×2 pixel unit is used to expand the effective area to 30 μm×30 μm,increasing the utilization rate of the circuit area.The SMIC 55 nm low-power and low-leakage process are used for simulation verification,and the total operating current of the array is controlled within 45 mA.(2)Design of conversion circuitAfter receiving thermal radiation and light energy,the detection model is converted into an easily processed electrical signal by the conversion circuit.To solve the problem of low signal-to-noise ratio in infrared pixels,a conversion structure of extract-thenamplify is proposed(bridge circuit current mirror type and CTIA integration circuit).To obtain nA-level signal current,theoretical derivation shows that the signal current is negatively correlated with the pixel resistance,and simulation analysis shows that the bridge circuit leveling current is 4.5 pA.The operational amplifier structure in CTIA is a wide-swing,compensation-capacitor-free,symmetrical operational amplifier with a gain error of 0.1%,and the integrated output is verified to be 0.6 V～2.2 V.To solve the problem of low fill factor in visible light pixels,a buried-type diode with high quantum efficiency is used,and the output of the conversion circuit is within the quantization range of 0.6 V～1.9 V.(3)Design of pixel-level ADCThe role of the pixel-level ADC is to convert the analog voltage obtained by the conversion circuit into a digital signal.A shared on-chip ADC is used to reduce area pressure,and the MCBS ADC with only 1-bit latch participation is used for parallel operation.To solve the problem of large on-chip data volume and frame rate(60 Hz)limited by the model thermal response time,comparison and transmission are timemultiplexed,and the unit readout time is reduced from 4.67 ms to 2.84 ms.A small-area,low-power operational amplifier is designed as a comparator,and two structures are analyzed and simulated.The low-power structure has better performance,with a maximum resolution of 14 bits and the shortest conversion time of 336 μs.Finally,the function of the 1-bit latch and ramp generator circuit is verified by simulation.