| In today’s society,digital information technology has been widely used in various industries such as vehicle networking,cloud computing and wireless communication.However,signals in nature are analog and cannot be processed by digital circuits,which requires the analog-to-digital converters(ADCs)to connect the analog and digital worlds.Among the various types of ADCs,Sigma-Delta ADCs are widely used in the audio processing field due to their high accuracy and low sensitivity to process deviation.High sound quality and long battery life have become the core competencies of all types of audio devices in the consumer market.Therefore,researchers have developed research and design around accuracy optimisation and power reduction for Sigma-Delta ADCs.In this paper,a fourth-order discrete Sigma-Delta modulator(the core part of a Sigma-Delta ADC)is designed for audio applications.The main contents are as follows:A system-level design of the modulator is carried out.Based on the design specifications,the modulator is determined to have a fourth order,a bit quantization and a cascade of integrators with feedforward(CIFF)structure type.The analysis and modeling of non-ideal factors(such as clock jitter,switching thermal noise,finite gain and finite bandwidth of operational amplifiers,etc.)that exist in real circuits has been completed,and their impacts on the modulator performance are researched.Behavior-level simulation of the overall model is performed,and after repeated debugging,the values of various parameters in the modulator structure are finally determined,increasing the feasibility of the system-level design.A circuit-level design of the modulator is carried out.Based on the system-level model,modules such as a integrator,a operational amplifier,a quantizer,a feedback digital-to-analog converter(DAC),a two-phase non-overlapping clock and a summing circuit have been studied and designed.For accuracy reasons,a bootstrapped switch is used to sample the input signal to improve the linearity of the sampled signal.For power consumption reasons,a dynamic latching comparator and a switching feedback DAC are used.And a dynamic bias circuit is designed to reduce the power consumption of the operational amplifier during the sampling phase based on an analysis of the operating state of the integrator.In this paper,a discrete Sigma-Delta modulator design for the audio processing field is completed using the UMC 110nm standard CMOS process at 1.2V supply voltage.Plate area is 0.177mm~2.The post-imitation results show that the effective number of bits of the modulator is 15.76bit,the signal to noise and distortion ratio is 96.66dB,and the power consumption is 623.4μW at 5.12MHz sampling frequency within 20KHz audio signal bandwidth. |