Research On Technology Of Hardware Trojan Security Protection Based On Intelligent Layout Filling

With the globalization of the semiconductor industry,the design and manufacturing processes of integrated circuits are gradually separated,which has caused a series of hardware security issues.At the stage of integrated circuit manufacturing,attackers can use blank areas in the original circuit layout to implant hardware Trojans,thereby destroying circuit functions and leaking key information.In response to the above problems,the paper carries out the research on the security protection technology to prevent hardware Trojans from implanting.By filling the blank area with A2-RO circuit that has sensing function,the security protection of integrated circuit is realized.This paper firstly designs the power consumption characterization circuit named A2-RO that can dynamically monitor the flipping of rare nodes.A2-RO circuit is composed of A2 circuit and Ring Oscillator(RO),and A2-RO circuit has the advantages of expandability and being easily filled.Secondly,in order to be able to detect removal attack,the A2-RO circuit is connected to the rare nodes in the original circuit.The operation mode of A2-RO circuit is controlled by bit-by-bit transformation algorithm,and this circuit has the sensing function for the circuit structure change.Once the attacker removes the A2-RO circuit and implants a hardware Trojan,the side channel information of the A2-RO circuit will change.Finally,in order to improve the practicability of the layout filling method,the target area extraction algorithm is used to extract the blank area information of the layout,the iterative filling algorithm is used to fill the blank area with standard cells and A2 customized cells,and the path construction algorithm is used to connect them into A2-RO circuit.Through the above process,intelligent layout filling is realized.Based on SMIC 180 nm process,the benchmark circuits of ISCAS’85 and ISCAS’89,AES encryption circuit and B17 microprocessor circuit are used as experimental circuits,and the layout is filled at the initial area utilization rate of 85%and 90% respectively.The experimental results show that the area utilization rate of the chip is increased to more than 96% after the layout is filled,and the remaining blank area can not be filled with the smallest size standard cell in the process library.After the removal attack,the side channel current variation of the A2-RO circuit is 0.648-0.704 m A,which effectively realizes the security protection of the blank area in integrated circuit layout.