Research On Programmable Logic Control System Based On Dual Processors Of ARM And FPGA

Compared with the graphical language of PLC,the programming,debugging and maintenance of single chip microcomputer are inconvenient.Therefore,the function of PLC is transplanted on the ARM system,and FPGA is added as the state machine processor.The research of programmable logic control system based on ARM+FPGA dual processor improves the efficiency of user program development and maintenance.The main research contents are as follows:Firstly,the PLC hardware system based on ARM+FPGA is studied.The characteristics of different PLC architecture are analyzed,and a dual processor PLC based on ARM+FPGA architecture is adopted,which gives full play to the rich interface resources of ARM and the powerful parallel processing ability of FPGA.ARM as the main processor,transplant PLC command parsing and control function,FPGA as coprocessor,realize the function of state machine.The power module,the core board of the hardware system,the input and output module and the communication module are designed.Secondly,the PLC software system based on ARM+FPGA is studied.The compiler module of the development machine is analyzed,and the intermediate code corresponding to the user source program is obtained for the execution of the software system to analyze the development machine program.The communication module between PLC and the development machine,the communication module between ARM and FPGA,and the input and output module are designed.PLC parses the instructions sent by the development machine and stores the memory space allocated to the system soft components and user source programs.The optimization based on FPGA state machine is proposed,and the conversion conditions are calculated by the ARM side.The state conversion is realized on the FPGA side according to the conversion conditions sent by the ARM side.Finally,the PLC based on ARM+FPGA is tested.The user program is written in the development machine and successfully downloaded to the dual processor PLC system,which verifies the effectiveness of the development machine programming system.Through the user program written by the development machine,the input and output of the PLC system are driven to verify the effectiveness of the input and output.By comparing the double processor PLC ladder diagram with the single chip C language program and the traditional PLC ladder diagram,it is verified that the double processor PLC programming efficiency is higher.