Research And Implementation Of A Dedicated SOC For Secure Encryption Based On ARM Architecture

The research results of this topic are mainly oriented to the MCU application market with encryption function,which can be applied in devices such as car electronic keys and portable data encryptors,which belong to the category of consumer electronics.Data in electronic products are easily leaked and tampered in the process of communication.In view of these information security problems,this topic carries out research on a special SOC chip for security encryption to realize that the security encryption SOC chip can switch encryption algorithms and complete the corresponding data encryption tasks quickly and effectively according to different application scenarios.The main work of this project is to design the mainstream cryptographic algorithms into hardware circuit modules and integrate them into the chip,which can protect the data from being leaked in the process of data communication.After analyzing the requirements of chip performance,design cost and complexity,this paper decides to design a general-purpose cryptographic chip based on ARM Cortex-M0 processor that integrates multiple cryptographic algorithms with conventional general-purpose peripheral interfaces(such as timer,UART serial port,GPIO,SPI,etc.),as well as a variety of cryptographic algorithm IP core modules and improved external boot modules.The chip can realize fast and effective encryption algorithm switching and complete the corresponding data encryption tasks according to different application scenarios.The details of the research are as follows.(1)In order to make the SOC security encryption function more robust,with higher encryption performance and better algorithm portability,all four algorithms with APB interface are added:AES,DES,RSA and SHA,and the logic circuit is optimized on the basis of the algorithm function implemented in hardware.In order to reduce the chip area and chip cost,the logic of SHA-1,SHA-224,SHA-256,SHA-384 and SHA-512encryption algorithm modules are optimized,and these five discrete algorithm modules are integrated into one module.(2)Aiming at the singularity of SOC boot method and the recognition success rate of SD card by SOC boot controller,a SOC boot controller that can implement multiple chip boot methods is designed,and the success rate of SD card reading is improved by using hardware approach,and can be widely used in the design of SOC boot scheme.The area of SOC boot controller designed in this paper is 61487.4721um~2,accounting for 1.5%of the chip area,and the power consumption is 0.333m W.(3)Based on Verilog HDL,the logic design of the encryption algorithm and the overall system integration of the secure encryption chip are performed in a top-down mode,based on the prototype verification of the FPGA development platform and NC-Verilog simulation platform,and the RTL to sign off level is completed in accordance with the standard digital circuit physical implementation flow in SMIC 0.11μm CMOS process GDSII layout file implementation.The final completed chip area after physical implementation is 4009766.28um~2 and the total power consumption is 52.763m W,of which the dynamic power consumption is 52.128m W and the static power consumption is634.518u W.