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Research Of Power Analysis Attack Methods On Cryptographic Chip Based On FPGA

Posted on:2010-07-17Degree:MasterType:Thesis
Country:ChinaCandidate:H F FanFull Text:PDF
GTID:2178360278980736Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
As the core component of the information security system, the security of cryptographic chip has a great influence on the whole information system. The theory of Side Channel Power Analysis brings much hidden trouble to the cryptographic chip. Utilizing the power information leaking while the cryptographic chip is working, Power Analysis can attack the cryptographic chip successfully. This method has advantages of great efficiency, low cost and high secrecy, and it makes a great threat to the cryptographic chip.Based on the analysis of Power Analysis Attack principles, a Power Analysis platform is designed and implemented in this thesis. This platform can conduct Power Analysis Attack experiments on cryptographic chips based on FPGA, and evaluate the performance of Power Analysis resistance.The Power Analysis platform consists of three modules: power simulation module, power measurement module and power analysis module. Based on current EDA (Electronic Design Automatic) design flow and software programming simulation technology, the power simulation module can convert the functional (timing) waveform file into power simulation data, and then Power Analysis attack experiments can be conducted. The power simulation module can predict the performance of Power Analysis resistance for the cryptographic hardware. The power measurement module can sample power data while the cryptographic chip is working. Through analyzing the power simulation data and the measurement data according to proper Power Analysis method, the power analysis module can evaluate the ability of cryptographic chip Power Analysis resistance.Power Analysis Attack experiments for DES and AES algorithms without Countermeasures are carried out based on this platform. The architectures of DES and AES algorithms are analyzed and the components which are vulnerable to attack are found. The CPA simulation attack is executed to DES algorithm and MSB 6 bits are broken successfully. The DPA attack with power measurement data is also implemented, result of which shows that the traits of differential power curves are distinct obviously, when the key guess is right and wrong. The CPA simulation attack with simulation power data and measurement data is accomplished to AES algorithm, and MSB 8 bits in the final round can be attacked.RSA hardware architecture with SPA Countermeasures on algorithm level is designed and implemented and Power Analysis experiment is made on this platform. Aiming at the architecture characteristic of RSA algorithm, MSB 4 bits can be attacked successfully with CPA simulation attack method. With the method of MESD(Multiple Exponent Single Data) DPA, the experiment is performed with measurement power data. By analyzing the trait of the power curves, the key of RSA algorithm can be obtained.The design thought of Power Analysis platform and Power Analysis Attack methods aiming at cryptographic algorithms are the same with ASIC cryptographic chips, and can also be used for reference to performance analysis of Power Analysis resistance based on ASIC.
Keywords/Search Tags:Power Analysis Platform, Hamming Distance, Cryptographic Chip, Data Encryption Standard, Advanced Encryption Standard, RSA
PDF Full Text Request
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