Design And Implementation Of Processing-in-Memory ASIC For DeePMD Molecular Dynamics

Molecular dynamics(MD),as a research method to simulate the motion of atoms in the microscopic world,has been widely used in many fields such as mechanics,physics,chemistry,and biology.With the gradual expansion of the scale and complexity of the studied molecules,molecular dynamics faces the dilemma of not being able to calculate the potential energy surface,which requires high accuracy on the one hand,and on the other hand,the existing computers cannot afford the computational overhead of complex operations in molecular dynamics.Based on these two aspects,The high performance accelerated computation of molecular dynamics studied in this thesis has far-reaching implications.In recent years,with the development of deep learning and molecular dynamics computation,a deep learning model DeePMD based on end-toend fitting of interatomic potential energy surfaces has been proposed.The model can effectively represent the potential energy surfaces of various systems with the accuracy of density function theory(DFT)and at the same time can reach the speed of empirical force field(EFF),effectively solving the problem of difficulty in both accuracy and speed in molecular dynamics calculations.However,traditional computers use the von Neumann(vN)architecture,which has a "storage wall" bottleneck,severely limiting the improvement of arithmetic power.Application specific integrated circuit(ASIC)can use the processing-in-memory(PIM)architecture,so that data does not need to be constantly transferred back and forth between the computing unit and the storage unit,thereby improving computational efficiency.Aiming at the dilemma faced by MD computing,this thesis proposes a design and implementation method of processing-in-memory ASIC for DeePMD molecular dynamics,the main work includes:1.The front-end(FE)design of PIM chip for DeePMD is studied and implemented.Based on the architecture model of DeePMD,the functional design of the MD chip is completed.In order to facilitate hardware implementation,the multi-layer perceptron(MLP)of the computing core uses shift operations instead of multiplication,and a simple and easy-to-implement nonlinear activation function is constructed,while the time-division multiplexing method is used in the overall design.Through experimental comparison,the design achieves the computational accuracy of density functional theory.2.The back-end(BE)design of PIM chip for DeePMD is studied and implemented.This thesis adopts the hierarchical flow and uses SMIC 55nm process library to implement the back-end design work of the chip.For the MLP module of the chip,this thesis optimizes the design,reduces the hardware overhead under the premise of ensuring the fitting accuracy,and adopts the flatten flow to achieve tape-out under the Silterra 180nm process.3.The verification of PIM chip for DeePMD is studied and implemented,and the MLP chip of the tape-out is tested,and the correct silicon verification is obtained.Through experimental comparison,the PIM chip designed in this thesis can improve the computation speed by 7 orders of magnitude over the traditional DFT method while satisfying the accuracy of MD computing.In addition when the same atomic system is calculated by using the DeepPMD model method under different platforms,the calculation speed of the MD PIM chip designed in this thesis is 3 orders of magnitude faster than the CPU of the Intel Xeon Platinum 8171M,and 2 orders of magnitude faster than the GPU of the GTX 1080Ti,which proves the feasibility of high performance computing on MD PIM chips.