Hardware Design Of Data Acquisition Card For 2.5GSPS Sampling Rate On PXIe

With the continuous cross-integration and development of science and technology and industrial products,many application scenarios put forward higher requirements for the integration and flexibility of instrument measurement equipment,and the data acquisition card based on PXIe communication bus meets the needs of different industries for precision measurement with the characteristics of size miniaturization and diversified functions,and slowly becomes an important core in the field of test and measurement.Many foreign companies have launched related products based on PXIe bus,but there are few similar products produced in China,so the development of a data acquisition card based on PXIe bus communication is of certain significance to the development of portable test instruments in China.Based on the PXIe data acquisition card development project undertaken during graduate school,this project mainly conducts in-depth research from the following aspects:(1)Overall scheme design of data acquisition card.First,starting from the functional indicators,analyze the functional modules required by the board;Then select the core device use model;Secondly,according to the functions of each module,the channel conditioning,time measurement and PXIe bus interface are designed to implement the final implementation scheme.Finally,the overall design scheme of the data acquisition card system is given in combination with each functional module.(2)Data acquisition processing and communication module design.Firstly,through the analysis of the data acquisition principle and data reception delay error,the chip synchronization technology is used to complete the transmission of the acquired data from the ADC to the FPGA,and then the ADC test function mode is used to complete the data reception synchronization calibration,and the storage of large-capacity data by DDR devices is realized through the design of the user-layer logic module centered on the MIG core.In the communication module design,the hardware design of PXIe board is first introduced,including clock generation module,power management module and storage configuration module,and finally the PXIe communication link based on XDMA IP core is built using the design method of Block Design.(3)High-precision trigger design.In the process of waveform acquisition and display,the use of analog trigger will cause waveform jitter,and the trigger position needs to be corrected,this project uses a combination of time broadening circuit and pulse direct counting module to complete the design of the time measurement module,and then complete the accurate measurement of the analog trigger offset through a high-precision time measurement method,and determine the number of sample points that need to be discarded in the storage FIFO according to the measurement results,and finally realize the stable display of the acquired waveform.Through the test of board performance,the PXIe interface-based data acquisition card designed in this topic meets the requirements of dual-channel real-time sampling rate of 2.5GSPS,analog bandwidth of 500 MHz,storage depth of 0.5Gpts per channel,and trigger jitter of no more than 50 ps.