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32-channel PXIe Digital Waveform Generation With Acquisition Module Hardware Design

Posted on:2024-06-28Degree:MasterType:Thesis
Country:ChinaCandidate:J L DuFull Text:PDF
GTID:2558307079458664Subject:Instrument Science and Technology
Abstract/Summary:PDF Full Text Request
As a brilliant achievement in human industrial design,integrated circuits have become extensively incorporated into our daily lives.Integrated circuit testing,an indispensable component of the industrial chain,necessitates the use of critical electronic testing equipment.The digital waveform generation and acquisition module,serving as a pivotal functional module within digital testing equipment,has found widespread application in product design,experimentation,and testing.Nonetheless,domestic research and product development in digital testing technology remain limited.Technical research,commercial product applications,and promotion in this field are predominantly led by Western countries,highlighting the significance of studying digital waveform generation and acquisition equipment.Against this backdrop and in conjunction with the research tasks undertaken in the development of digital waveform modules for a specialized project,an in-depth investigation into digital waveform generation and acquisition functionality was conducted.This study encompasses the following key aspects:1.Development of a 32-channel digital waveform generation and acquisition module hardware based on the PXIe platform.The study first provides a detailed description of the hardware functional module divisions and presents two design schemes targeting the core functions of digital waveform generation and acquisition: a driver-level conversion chip combined with a comparator scheme and an integrated IC pin electronic chip scheme.Following a comparative analysis,the pin electronic chip scheme was ultimately selected.Concurrently,a clock network was designed to address the requirements for multiple input and output clocks within the module.2.A waveform generation scheme based on ODDR dual-edge flip-flops and adjustable edges is designed to meet the index requirements of digital waveform transmission.Among them,the ODDR-based scheme realizes DDR operation of data,and the adjustable-edge scheme realizes flexible adjustment of waveform edges.Both of these schemes have positive significance for digital testing.For digital waveform acquisition,three different logical circuits are designed,and the acquisition scheme based on the phase interpolation method is finally selected based on the hardware design scheme,which achieves high-speed and adjustable-phase acquisition effects.Considering the impact of logic circuit and transmission path delays on channel synchronization,corresponding logical designs are proposed for channel synchronization.3.High-speed data flow storage logical circuit implementation.Large amounts of data processing and storage are involved in the process of data transmission and acquisition.Different storage schemes are designed for data transmission and acquisition requirements.In order to solve the DDR3 data stream conflict problem generated during simultaneous transmission and acquisition,an arbitration mechanism is designed.In conclusion,this study presents test verification results for the PXIe waveform generation and acquisition module-related indicators,substantiating the validity of the design approach.The test results demonstrate that the channel count,transmission and acquisition rates,channel synchronization,edge adjustment,and output clock jitter of the PXIe waveform generation and analysis module fulfill the design specifications.
Keywords/Search Tags:PXIe, waveform generation and acquisition, Pin electronics chip, inter-channel synchronization, bus arbitration
PDF Full Text Request
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