Svstem Design And Implementation Based On Centralized TDMA Mechanism

Wireless communication has enriched human daily life with its various characteristics such as freedom and convenient access,and people rely more and more on wireless communication.In order to meet human’s needs,wireless communication technology is developing at a faster rate,and various new technologies are continuously proposed.Different technologies should be adopted for different system requirements.When the requirements change,the communication system needs to be designed in a targeted manner.This thesis designs and implements a wireless communication system based on centralized time division multiple access mechanism for reliable networking and communication.This thesis has completed a complete wireless transmission architecture and system control mechanism based on ARM.This platform can ensure robust communication between nodes,and it has great practical value.The specific work and contributions are as follows:In terms of system communication network,a network using star topology and centralized time division multiple access is designed.After analyzing the advantages and disadvantages of classic time slot allocation algorithms,a dedicated slot allocation algorithm is proposed according to the specific application.Then,based on the fact that some nodes are powerlimited in the actual scenario,a flexible slot allocation strategy is designed,and a multi-slot dynamic power allocation algorithm is proposed for the resulting multi-slot allocation strategy and time-varying channel.The algorithm comprehensively considers the time-varying characteristics of the channel and the power constraints of each node in each scheduling period,and allocates power to the multiple time slots allocated to each node in a scheduling period.Through the simulation comparison between this algorithm and the existing fixed power allocation algorithm,the results show that the proposed algorithm can effectively improve the throughput.In terms of system implementation architecture,the framework of node hardware structure with ARM-FPGA being the core architecture is designed,and the interfaces between each module and chip selection are clarified.According to the application scenarios of this thesis,the EIM interface is selected as the main data interaction interface between ARM and FPGA,and its data transmission format is designed and implemented.After that,based on the time division multiple access mechanism and hardware structure,this thesis designs the system timing package as the basis for time slot division,and the generation and processing flow of the timing package are realized.Based on timing package,according to the actual data transmission requirements of the system,the overall data interaction scheme and data processing flow of ARM and FPGA are designed and implemented.Among them,in the design of ARM receiving FPGA data,this thesis proposes the communication mechanism with a twolevel FIFO.By testing on the realized platform,such mechanism can ensure the proper data interaction function between FPGA and ARM and proper cooperation with other functional modules on the ARM side in actual work.In terms of implementation on ARM,this thesis designs and implements the system communication protocol and system control mechanism.In terms of system communication protocol,in order to ensure reliable communication between nodes,a set of communication protocols is designed,including CRC check,ARQ mechanism and data encryption.In terms of system control functions,it makes full use of the characteristics of ARM and FPGA to realize system control functions on the ARM side,.including control of FPGA modulation mode,control of AD chip and control of radio frequency module.The functions designed and implemented in this thesis have been thoroughly tested on the supporting hardware platform.The results verify that the internal data transmission of each node is correct,the reliable communication between the nodes can be achieved,and the system control is accurate.Accordingly,the realized system based on centralized time division multiple access mechanism is expected to be used in practical systems.