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Study On Key Process And Technology Of GaN-based Vertical Structure Devices

Posted on:2022-12-25Degree:MasterType:Thesis
Country:ChinaCandidate:Y B ChenFull Text:PDF
GTID:2518306788956949Subject:Wireless Electronics
Abstract/Summary:PDF Full Text Request
GaN has excellent material properties and is suitable for the preparation of high-frequency,high-voltage and high-power devices.GaN device structures include lateral structure devices and vertical structure devices.Because vertical structure GaN devices have many advantages that lateral structure devices do not have,it has caused extensive research at home and abroad in recent years and has achieved many research results.If these research results can be transformed into our daily use of devices,will better promote energy conservation and emission reduction.However,due to factors such as the price of GaN epitaxial wafers and device manufacturing costs,the industrialization of GaN vertical structure devices has been slow.This paper proposes to use the existing mature Si-CMOS process line to produce GaN vertical structure devices in combination with relatively low-cost silicon-based GaN epitaxial wafers,so as to reduce the production cost and promote its industrialization.This paper focuses on the key process of CMOS compatible silicon-based GaN vertical structure device preparation.First,the N-type gold-free ohmic contact process on silicon-based GaN is studied,and then the electrode metal structure and annealing conditions are explored.Finally,CMOS compatible GaN-on-silicon vertical structure SBD.The main research contents and results of this paper are as follows:1.The study determined the electrode metal structure Ti/Al/Ti/Ti N of the Au-free process,designed the sample test pattern,and carried out ohmic contact experiments with different Ti(first layer)thicknesses.Through the results of preparation,testing and analysis of the test samples,it is determined that when the thickness of the first layer of Ti in the electrode structure is 20nm,the ohmic contact with silicon-based N-type GaN is better.2.The appropriate annealing temperature for Au-free ohmic contact on N-type GaN was explored,and a research plan was formulated.Finally,the appropriate annealing temperature for silicon-based N-type GaN Au-free ohmic contact was determined to be 650?.It is found that the electrode with the structure of Ti/Al/Ti/TiN(20nm/50nm/10nm/25nm)has the best ohmic contact formed by annealing in N2atmosphere at 650?for 60s,and the corresponding specific contact resistivity?cis 8.76×10-6?·cm~2.3.The key process of Au-free N-type GaN ohmic contact obtained by the application research,the CMOS compatible silicon-based GaN vertical structure SBD has been prepared,and good performance has been achieved,which proves the use of silicon-based GaN epitaxial wafer and Si-CMOS process.Feasibility of fabricating GaN vertical structure devices by wire bonding.
Keywords/Search Tags:GaN, vertical structure, CMOS-compatible process, ohmic contact, industrializationing
PDF Full Text Request
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