Research On CMOS-compatible Technology And Reliability Of GaN Power Devices

Owing to the wide bandgap,high electron velocity,high thermal conductivity and high carrier mobility,GaN material becomes one of the best candidates of power semiconductors.Meanwhile,benefit from high electron mobility,the heterostructures based on GaN material have attracted attention from both academic and industrial circle.However,the industrial development of GaN power device faces with many challenges,such as the high cost of the GaN manufacturing and the device reliability problems.Nowadays,along with the fast development of large-size GaN material growth on Si substrate,the GaN industry start exploring the possibility of the device fabrication on Si CMOS processing line.The CMOS-compatible technology,on one side,can effectively lower the manufacture cost of GaN device.On the other side,the mature Si CMOS technique can reduce the process damage introduced by the conventional compound semiconductor processing line.Starting from device physics,this paper discuss reliability-enhanced technique of GaN HFET and carry out a series of studies,which focus on CMOS-compatible key process of Ga N power device.The specific innovations in this paper as follows:Firstly,in order to enhance the breakdown capacity and the device reliability of GaN HFET,the breakdown mechanism of conventional Schottky-gated GaN heterostructure field effect transistor?HFET?is carried out based on simulation and experiment.To suppress the gate leakage current,a SiN_x dielectric growth technique by low pressure chemical vapor deposition?LPCVD?and an O₃-assisted Al₂O₃ dielectric growth technique by atomic layer deposition?ALD?are developed in this paper.Through the experiments of GaN devices with gate dielectric,we analyze and compare the leakage current,breakdown voltage,conduction-band offset and other electrical parameters of different dielectric materials on GaN.In addition,the degradation mechanism of dielectric in high temperature environment is carried out through the experiments of different temperature annealing on Al₂O₃ dielectric.The developed dielectric techniques are appropriate to both compound processing line and Si CMOS processing line.This research establish the structural basis of high reliability GaN devices for the following studies on CMOS-compatible technology.Secondly,in order to avoid Ga polluting CMOS processing line,a low-damage dry etching technique is carried out.By increasing the environment temperature of dry etching,the volatilization of etch residues?such as GaCl₃?is promoted,contributing to a high efficiency etching and low plasma-induced lattice damage in the meantime.Taking the advantages of low-damage high-temperature dry etching technique,we accomplish the high-performance enhancement-mode GaN HFET with gate-recessed structure.Due to the low etching damage in the heterostructure channel,the enhancement-mode GaN HFET fabricated by the high-temperature dry etching technique achieves higher channel mobility,lower conduct resistance and better DC/RF/dynamic characteristics,compared with the HFET fabricated by conventional dry etching.The low-damage dry etching technique not only be applicable to CMOS-compatible process of GaN device fabrication,but also provides key technical support to the following research on gold-free ohmic contact.Thirdly,in order to avoid heavt metal pollution?such as Au?in CMOS line,Ti/Al/Ti/W and Ti/Al/Ti/TiN gold-free ohmic contacts solutions on AlGaN/GaN recessing the AlGaN barrier layer in ohmic contact region through low-damage dry etching technique are proposed in this paper.In addition,the high thermal budget of the conventional gold-contain ohmic contact limits the implementation of a self-aligned gate-first CMOS process.The proposed gold-free ohmic contacts not only realize the compatibility to CMOS processing line,but also reduce the ohmic annealing temperature from conventional 800?above to 550?below.The developed gold-free ohmic contacts accomplish favorable performance and process stability.Meanwhile,in-depth studies to the mechanism of gold-free ohmic contact are carried out.Through variable temperature testing experiments,we find out that field emission is the dominant mechanism of gold-free ohmic contact on AlGaN/GaN.By the assist of the high-resolution transmission electron microscopy?HR-TEM?analysis,we reveal the mechanism of alloy reaction between the gold-free metal stacks and AlGaN/GaN semiconductor material.The bottom Ti layer plays a catalytic role for the Al-N reaction and N extraction to achieve the good performance of gold-free ohmic contact on AlGaN/GaN.Fourthly,to make the gate electrode compatible to CMOS line,a Ni/TaN gate electrode technique is developed.Finally,by integrating the developed techniques of the dielectric deposition,the low-damage dry etching,the gold-free ohmic contact and the gold-free gate techniques,a full set of CMOS-compatible GaN device fabrication technology is accomplished in this paper.The enhancement-mode GaN power devices with high performance and high reliability are successfully fabricated on AlGaN/GaN epi-material with Si substrate.