Research Of Scalable DBF Module Based On Multi-level FPGA

Now that the target environment and electromagnetic environment are becoming more and more severe,digital array radars are widely used in modern radar systems due to their high maneuverability,high speed and strong anti-jamming capabilities.The digital beamforming module(DBF)as the core module of the digital array radar ensures stable and reliable operation of the array radar.Therefore,research on DBF modules and their systems is very important and worth the application.First,the principle of DBF was realized through analysis and research,and the characteristics of optical fiber communication,FPGA(Field Programmable Gate Array)high-speed interface,VPX,PCIe(Peripheral Component Interconnect Express)and SRIO(Serial Rapid IO)that constitute the DBF system were studied and analyzed,it is difficult to realize the transmission and processing of a single-chip FPGA from the digital array antenna.For the problem of raw data,it is proposed to use multi-level FPGA cascade to realize multi-level DBF processing to maximize the data transmission and processing capacity of a single module.At the same time,using the VPX highspeed serial bus architecture,the DBF modules were cascaded to form a DBF system,which enhance data processing capabilities by increasing the number of data receiving channels and DBF processing stages.To improve the efficiency of data exchange in the system,PCIe to SRIO communication is used to performed multiple one-to-one or oneto-one communication between the host computer and multiple FPGAs.Secondly,comprehensively considering the system index requirements,reasonable selection of the core components of the DBF module,FPGA,optical communication module,and power supply chip,learned and designded more about FPGA circuit breakers,clock circuits,and DBF modular power network statistics.At the same time,considering the effect of signal transparency on the high-speed transmission method,such as PCB(Printed circuit board)stacking,fan-out,layout and wiring,power distribution,etc.,on the one hand,improved the integrity of the highspeed signal of the circuit board.On the other hand,the electrical characteristics of high-power devices were simulated and optimized to ensure the reliable transmission of high-speed link data in the DBF system.In the end,the board system and system construction of the DBF module were completed,and performance tests were performed on it.The cascadable DBF module and system designed based on multi-level FPGA realized the high-speed reception and processing of huge digital echo data.Among them,the single-board DBF module can support up to 96 channels of optical fiber echo data reception and realize multi-level DBF processing within the module;the cascaded DBF system can realize multi-level DBF processing between modules,and the number of acceptable channels in the experiment is 480 Channels of optical fiber echo data can eventually be expanded to1152 channels in the system;the communication line rate in the entire system has three options of 3.125 Gbps,5Gbps,and 10 Gbps to match different digital array antenna optical fiber data line rates;combined with PCIe The PSCN(PCIe-SRIO Communication Net)communication network formed with SRIO enables the host computer to read and write any FPGA in the system;the module has storage space for beam synthesis data,snapshot data,and original data storage,and can generate synchronization signals,clocks,etc.,to meet high efficiency Application requirements for scalable digital beamforming systems.At present,the DBF module designed in this paper has been applied in the project,which verifies the reliability and stability of the system designed in this paper.