Research On On-Chip Antenna Based On Various Processes

With the vigorous development and technological innovation of the domestic integrated circuit industry,great opportunities and challenges have been brought to the existing wireless communication system.As the signal transceiver component of the system,the off-chip antenna has encountered many problems when it is applied to the chip system,and as the frequency increases,the disadvantage of the traditional board-level antenna becomes more obvious.The on-chip antenna designed directly through the chip process has become a research hotspot to solve this problem.The on-chip antenna has the characteristics of miniaturization,easy integration and low interconnection loss,which also makes it a good potential for use in integrated circuit systems..However,since the low resistivity silicon substrate used in the general process is not suitable for the design of the antenna,how to reduce the influence of the substrate and improve the gain of the AOC is the main research objectives at present.At the same time,the circular polarization performance is introduced into the on-chip antenna to improve the anti-interference ability of the on-chip antenna signal transmission,and to realize the application ability of the on-chip antenna in different scenarios is also the research goal of this thesis.The main research work of this topic can be summarized into two points:(1)The realization method of circular polarization performance of on-chip antenna is studied.In the 65-nm CMOS process,the circular polarization performance of the on-chip antenna is realized by means of chamfering and slitting.The large area pad in the CPW structure is used to improve the S₁₁ and circular polarization performance of the antenna,and the dummy required in the process rules is carried out.Simulation analysis.The size of the final designed on-chip antenna is 1×1mm2,the impedance bandwidth is 58-90GHz,the axial ratio is less than 3d B in the 62.5-67.6GHz frequency band,and it has a wide beam circular polarization performance.In the SOI process,the circular polarization performance of the on-chip antenna is realized by adding parasitic branches instead of chamfering.The final designed circularly polarized on-chip antenna based on the SOI process has a resonant frequency of 65.75GHz and a circular pole of0.91%(65.4-66GHz).bandwidth,and due to the influence of the high resistance silicon substrate in the process,the gain at the resonance point can reach 4.5d Bi.(2)Research the realization method of high gain performance of on-chip antenna.A microstrip patch antenna with fractal structure is designed on the top metal M9 of the65-nm CMOS process,and an artificial magnetic conductor is designed with the bottom metal M1,and a dielectric resonator is added on the top of the chip to improve the gain of the on-chip antenna.The area of the final designed on-chip antenna is 1.5×1.5mm 2,and the impedance bandwidth is 52.63%(42-72GHz).The on-chip antenna achieves a peak gain of 2.7d Bi at 60GHz,and the sum increases the gain of the on-chip antenna by2.5d B.In addition to the method of loading artificial magnetic conductor(AMC)and dielectric resonator(DR),the on-chip antenna with high gain is realized by adopting the Ga As process to eliminate the loss introduced by the low-resistance silicon substrate,and the physical test of the on-chip antenna is completed.