| Due to the characteristics of high voltage,fast switching speed,high power density,low dissipation and high thermal conductivity,silicon carbide（SiC）metal-oxide-semiconductor-field-effect transistors（MOSFETs）present a potential to serve the future power electronics market,such as electric vehicle,charging pile and photovoltaic inverter.At present,commercial SiC MOSFETs are mainly divided into planar gate structure and trench gate structure.Compared with planar SiC MOSFETs,trench SiC MOSFETs have higher power density and lower on-resistance,so that it can make better use of silicon carbide strengths.Although SiC MOSFETs have made some progress in recent years,its reliability issues have not been effectively addressed.Especially in the extreme electrical stress avalanche environment,the MOSFETs are required to withstand extremely high avalanche voltage and avalanche current at the same time and the resulting high temperature will affect the normal operation of the device.In this thesis,to solve the avalanche reliability issued faced by trench SiC MOSFETs,the avalanche reliability test platform and the semiconductor numerical analysis tool Synopsys Sentaurus TCAD were independently designed and built,combined with device section,EMMI,FIB and other failure analysis methods.The single avalanche and repetitive avalanche robustness of asymmetrical trench and double trench SiC MOSFET is systematically studied,and the degradation and failure modes of repetitive avalanche under different inductive loads and different avalanche energy ratios are explored.The deep physical mechanism of repeatitive avalanche degradation or failure of DUTs is clarified and the restricting factors of repeatitive avalanche capability of different trench SiC MOSFETs are revealed,which has a good guiding role for engineering application of trench SiC MOSFETs.Firstly,the avalanche reliability test platform was designed and built to evaluate the single avalanche capability of asymmetric trench and double trench SiC MOSFETs.The single avalanche test results show that the single avalanche robustness of the two types trench SiC MOSFETs is subject to thermal stress and electric field stress respectively.Based on the single avalanche energy,the repeatitive avalanche robustness of SiC MOSFETs is compared and evaluated.The degradation and failure modes of the devices under repeatitive avalanche stress were determined by monitoring the static parameters and three-terminal impedance.Under 20%energy ratio,the increase of on-resistance of asymmetric trench SiC MOSFETs is caused by thermal fatigue,which belongs to thermal induced failure.The decrease of threshold voltage and on-resistance of double trench SiC MOSFETs is caused by hot hole injection into gate oxide layer,which belongs to electric field induced failure.When the avalanche energy ratio increases to 40%,the asymmetric trench SiC MOSFETs exhibits different degradation or failure modes under different inductive loads.Under the condition of 3.6m H inductor,the field oxide degrads and breaks down,which is inferred to be caused by thermal stress.Under 300μH inductive load,the degradation mechanism is hot hole injection and metal thermal fatigue.For SiC MOSFETs with double trench structure,the failure under40%energy ratio is gate-drain terminal short-circuit and the failure mechanism is gate oxide breakdown,which belongs to electric field induced failure.Finally,Sentaurus TCAD simulation tool was carried out to compare and analyze the impact ionization rate and electrothermal distribution of trench SiC MOSFETs under avalanche condition.It was verified that the degradation or failure of asymmetric trench and double trench SiC MOSFETs was caused by thermal stress and electric field stress respectively.The failure location was determined based on device decapsulation,EMMI and FIB.The failure of asymmetric and double trench devices was caused by the degradation of field oxide above the polysilicon gate and the breakdown of the gate oxide layer,respectively.In addition,repeatitive avalanche and single avalanche were compared and their differences were analyzed.Different from the destructive failure of single avalanche test,the failure under repeatitive avalanche stress is associated with the accumulation of gate oxide traps and thermal stress.In this thesis,the avalanche ruggedness of trench SiC MOSFETs is systematically studied through avalanche test and numerical simulation analysis method.Different degradation and failure modes are found in SiC MOSFETs with different trench gate structure.The deep physical mechanism of repeatitive avalanche degradation or failure of DUTs is clarified and the restricting factors of repeatitive avalanche capability of different trench SiC MOSFETs are revealed,which has a good guiding role for engineering application of trench SiC MOSFETs.A larger inductance can relax the electric field stress and a smaller load current(Iload)can improve repetitive avalanche ruggedness for both asymmetric and double trench SiC MOSFETs.Furthermore,a better thermal management is suggested for asymmetric SiC MOSFETs under repetitive avalanche condition. |
