Neural Network Based Low Power Keyword Spotting Hardware Design

With the large-scale popularization of mobile terminals such as the Internet of Things(IoT),the demand for speech human-computer interaction is ever-growing.Speech keyword spotting is usually used as the entrance of human-computer interaction and needs to be kept on for a long time to provide switch control for subsequent applications such as more complex speech content recognition.Therefore,it is of great significance to realize low-power speech keyword spotting.The traditional speech keyword spotting technology is mainly based on traditional machine learning,which is low accuracy.With the development of deep learning technology,neural network technology has been applied to the speech keyword spotting task,which has greatly improved its accuracy.However,the computational complexity of neural network technology is high,resulting in high processing power consumption and large hardware overhead.To solve this problem,this thesis focuses on the low-power speech keyword spotting hardware design based on neural network.First,this thesis investigates the related work at home and abroad,analyzes and compares the existing speech keyword spotting algorithms,including methods based on traditional machine learning and neural network,summarizes the problems faced by the existing methods,and introduces the chapter structure.Secondly,in view of the existing problems,this thesis proposes a low-complexity speech keyword spotting algorithm at the algorithm level.Based on the deep separable convolutional neural network,the amount of parameters and calculation of the algorithm model are greatly reduced while ensuring the accuracy of the algorithm.At the same time,this thesis also makes adjustments to the network structure that are beneficial to the design of low-power hardware.Through the above optimization,the amount of parameter and calculation of the speech keyword spotting algorithm based on neural network are greatly reduced,which lays a foundation for reducing processing power consumption and hardware overhead at the hardware level.Then,at the hardware level,this thesis proposes an event-driven hardware architecture,approximate computing technology,mixed-precision multiplication computing technology,etc.,and implements them on FPGA and ASIC respectively.The specific work includes: This thesis designs an event-driven hardware architecture,filtering out short noise,long silence and other states with a speech filtering algorithm with extremely low complexity,which greatly reduces the computational power consumption of subsequent feature extraction and neural network;This thesis designs the approximate computing technology,which skips the reading operation,writing operation and calculation process of near-zero values,and reduces the dynamic power consumption of the storage unit and computing unit;The mixed-precision multiplication computing technology is designed to reduce the low-precision feature data calculation process,further reducing the dynamic power consumption of the computing unit.Through the above technology,the processing power consumption and hardware overhead of speech keyword spotting are greatly reduced.Finally,this thesis tests and analyzes the low-power speech keyword spotting hardware design based on neural network.Through analysis,compared with the existing algorithms,the proposed low-complexity speech keyword spotting algorithm reduces the amount of parameters and calculations by 20 to 200 times.For the 10 keyword classification based on Google Speech Commands Dataset,the accuracy rate is as high as 90.31%.In addition,the ASIC chip area based on the 40 nm process is 0.31mm~2,the keyword classification time is 200 ms,the dynamic power consumption is 3.15 uW,and the static power consumption is 4.90 u W.The design can be widely used in Io T smart terminal equipment to provide them with key technical support for speech humancomputer interaction.