Font Size: a A A

Keyword-spotting-oriented Low-power BWN Optimization And VLSI Implementation

Posted on:2022-03-07Degree:MasterType:Thesis
Country:ChinaCandidate:Y H SunFull Text:PDF
GTID:2518306740493964Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
Keyword spotting(KWS)techniques have been widely used in interactive devices.Low power consumption is an important consideration especially for devices which are based on battery power supply.This thesis proposed a keyword spotting accelerator based on the optimized binarized weight network(BWN).From algorithm's perspective,a keyword spotting system based on the BWN was designed for the speech data which recorded from 5dB SNR to clean noise environment.Firstly,this thesis proposed a step-by-step quantization for neural network training,and selected a network model that was suitable for weighting the network weight to 1bit.Secondly,the software and hardware co-design method was used for binarized network models.The algorithm designed above can realize the recognition of 10 speech keywords,and the accuracy results are 89.1%,86.5%and 80.8%for clean(near microphone),15dB SNR and 5dB SNR background noise environment respectively.From hardware's perspective,the circuit architecture was designed with regard to the optimized keyword spotting algorithm.Firstly,the design differences between the performance-efficient and the power-constraint circuit architectures were compared.The power-constraint BWN accelerator architecture can reduce power consumption by 2.7 times.Secondly,low-power design techniques were applied to specific modules.Thirdly,this thesis took the power-constraint circuit architecture as the tape-out version,and adopted a dual-voltage design scheme,and conducted low-voltage tests for the chips under different processes after the tape-out.The process of circuit implement of this thesis is TSMC 22nm ULL.Power-constraint BWN accelerator architecture was taped out.The layout design area is 0.6mm~2.When the operating frequency is 250k Hz,the driving voltage of IO,SRAM and logic circuit are 1.8V,0.6V and 0.39V respectively,real-time detection of keywords can be realized.The overall power consumption of the chip under the HVT is about 7.9?W,and KWS system power consumption is about 4.1?W.Compared with the current research results,this thesis not only achieves keyword recognition under different background noise environments,but also reduces system power consumption by 4.5 times.
Keywords/Search Tags:keyword spotting, binarized weight network, bit-by-bit quantization, software and hardware co-design
PDF Full Text Request
Related items