IF Digital Receiver Based On FPGA+DSP And Implementation Of Anti-jamming

At present,the software radio technology has been widely applied to communication systems.As an important part of the terminal-guided projectile synchronous communication system,the synchronous receiver is no longer suitable for today's complex combat environment due to its large size,high power consumption and poor anti-jamming ability.Based on the above background,this paper proposes an IF digital receiver design scheme based on software radio technology to solve the shortcomings of traditional synchronous receivers.The main work is as follows:Firstly,analysis of the composition and structure of software radio and related theories,and from the point of view of feasibility and engineering realization,the overall design scheme of IF digital receiver based on FPGA+DSP is determined.Secondly,it focuses on the detailed design of the digital signal processing board of the receiver,mainly including the AD9288 circuit design that realizes the analog-to-digital conversion of intermediate frequency signals,the design of baseband signal processing circuit with FPGA as the core,the design of data calculation circuit with DSP as the core,and the design of power supply module and related peripheral circuits.At the same time,for the purpose of ability of the receiver at the anti-interference is improve,research on the basic principle of frequency domain anti-jamming based on FFT,and the main links in the process of interference suppression are analyzed,including the selection of window function and the reduction of signal caused by windowing.Distortion problem,then the calculation method of the interference detection threshold is analyzed,and an adaptive threshold calculation method is adopted.Finally,the simulation analysis of the frequency domain interference suppression algorithm based on the above method is carried out.,and the reliability of the above method is verified.Finally,the related module design of the narrowband interference suppression algorithm in the frequency domain is completed in the FPGA part,including the digital down-conversion module,the delay windowing module,the interference detection and suppression module,etc.the functional simulation test of the above modules is completed,and the feasibility of using FPGA to achieve frequency domain interference suppression is verified.