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Design Of Convolutional Neural Network Acceleration System Based On Open Source RISC-Ⅴ Processor

Posted on:2022-05-29Degree:MasterType:Thesis
Country:ChinaCandidate:X F JiaFull Text:PDF
GTID:2518306740493984Subject:IC Engineering
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In recent years,convolutional neural networks have been widely used in image recognition,speech recognition and other fields.However,the convolutional neural network algorithm has the two major characteristics of calculation intensive and storage intensive,so that traditional mobile terminal equipment cannot meet specific requirements in terms of real-time calculation and power consumption when deploying the algorithm.At the same time,in mobile terminal equipment,the design cost of the processor accounts for a relatively high proportion of the total cost.Therefore,the study of an acceleration system with an open source processor as the core and a convolutional neural network hardware accelerator has important practical significance.First,the calculation process of the convolutional neural network algorithm and its calculation parallelism are analyzed in detail in the thesis.Aiming at the differences between different neural network models,a neural network hardware accelerator with configurable operating parameters is designed.The accelerator has multiple parallel convolution operation units and data buffer units,which can parallelize the calculation of input channels and output channels.The calculation data of the input accelerator is expressed by a fixed-point number with a quantization accuracy of 8bit.The accelerator also supports two activation methods,Re LU and Sigmoid,and two pooling methods,maximum pooling and average pooling.On the basis of the designed hardware accelerator,with the open source RISC-Ⅴ processor RI5 CY as the core,an acceleration system with a convolutional neural network hardware accelerator was constructed through the AXI4 bus,and related system startup,hardware driver layer and application interface layer were designed.Software to support the deployment of algorithm models.The system is tested using the classic VGG16 network model in the XC7Z100 FPGA platform of Xilinx Company.The operating frequency of the system is 150 MHz,the peak throughput of the hardware accelerator is 129.6GOPS,the power consumption is about 4.8W,and the energy efficiency ratio is 27.1GOPS/W..
Keywords/Search Tags:Convolutional Neural Network, Hardware Accelerator, RISC-Ⅴ Processor, System on Chip
PDF Full Text Request
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