Algorithm Design And Implementation Of Transcendental Acceleration Unit

With the development of big data and artificial intelligence,the requirements for the computing performance of the chip are getting higher and higher.Transcendental function operations such as trigonometry,inverse trigonometry,logarithms,exponents are very common in practical applications.These operations are more complicated than addition and multiplication operations,and the software algorithms for these operations take longer to operate,and it is difficult to meet the requirements of data-intensive,speed-critical,and real-time applications.Therefore,it is necessary to design a dedicated circuit unit to accelerate the calculation process of these transcendental functions.The main work of this paper includes:1.Completed the algorithm research and design implementation of the sine and cosine arithmetic unit.Based on Taylor's theorem and the piecewise second-order polynomial approximation method,the algorithm design of the sine and cosine arithmetic unit is completed.Furthermore,according to the designed algorithm,the architecture design and signal bit width design and optimization are completed,and simulation verification is performed.The simulation results show that the error between the operation result of the sine and cosine arithmetic unit and the accurate result is less than 1 ULP,and there is no monotonic violation,and the required hardware cost is close to that of similar arithmetic units.2.Completed the algorithm research and design implementation of the arctangent arithmetic unit.By studying the algorithm of four-quadrant arctangent operation,the two key steps of the algorithm are extracted,namely quadrant operation and twoquadrant arctangent operation.Furthermore,the algorithm and the hardware architecture design of the two-quadrant arctangent operation is completed,and the designed hardware architecture is simulated and verified.The simulation results show that the error between the calculation result of the arctangent arithmetic unit and the accurate result is less than 1 ULP;the arithmetic unit output gradually increases with the increase of the input,there is no monotonic violation;and the required hardware cost is lower than similar arithmetic unit.3.The algorithm research and hardware architecture design of two types of transcendental functions,logarithm and exponent,and two types of auxiliary operations,division and root-opening,have been completed,and simulation verification has been carried out.The simulation results show that when the designed arithmetic unit performs the four types of operations,the error between the arithmetic results and the accurate results is less than 1 ULP,which meets the design accuracy requirements.4.Completed the design and implementation of the TAU(Transcendental Acceleration Unit).According to the analysis of the characteristics of the algorithms and architectures of various arithemetic units,the architecture of the TAU that can be used to complete the various function operations described in this paper is obtained,and completed the pipeline division and comprehensive optimization and physical realization for the TAU.The research results show that all the operations of the TAU meet the design accuracy requirements(the error of the calculation result is not more than 1 ULP),and the monotonic violation of the algorithm of sine,cosine and arctangent calculation is eliminated.The result shows that the area of TAU is 1,201,108 ?m,and the operating frequency is 100 MHz.