Font Size: a A A

4H-SiC MOS Capacitor Interface Improvement Process And Electrical Properties

Posted on:2022-04-21Degree:MasterType:Thesis
Country:ChinaCandidate:Z P LvFull Text:PDF
GTID:2518306731987289Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
Silicon carbide(SiC)with a wide bandgap,high critical electric field,high thermal conductivity and high saturation drift velocity,is an outstanding semiconductor material for power devices.Si C MOSFET devices are the third generation of power semiconductor devices suitable for high voltage and high power applications.However,the channel mobility and the reliability of thermally-grown SiO2are still far from satisfactory owing primarily to the high density of interface and near-interface traps.This article focuses on insulation layer improvement process to produce high quality oxide/4H-Si C interfaces.A novel thermal oxidation method combined low oxygen partial pressure and high temperature for growing a thin SiO2layer is proposed for improving the Al2O3/4H-Si C-based MOS structure characteristics.Compared with 800°C thermal oxidation method,the experimental results show that the proposed method can effectively reduce the density of trapping charges in the oxide and at the gate dielectric/4H-Si C epilayer interface,and improve the breakdown characteristic of the MOS structure.The interface trap density(Dit)at energy level of 0.2 e V below the conduction band edge(EC)of 4H-Si C in the sample by our proposed method is reduced to 6.6×1012cm-2e V-1,which is about 4 times lower than the as deposited Al2O3/4H-Si C sample.The low oxygen partial pressure oxidation sample had a breakdown electric field of 8.4MV/cm,which was higher than other samples.The core reason underlying the improvement of 4H-Si C devices was studied by X-ray photoelectron spectroscopy(XPS)measurements and transmission electron microscopy(TEM).The method combined low oxygen partial pressure and high temperature obtained the reduced SiO2layer thickness and lower Si CxOycomponent concentration,as shown by XPS measurements.Thickness of approximately 0.4 nm was found for SiO2layer grown at1150°C for 10 min by TEM.Last,four different oxidation time ranging from 10 min to 120 min was chosen to study the effect of high temperature and low oxygen partial oxidation time on the properties of devices.The experiment results showed high performance 4H-Si C MOS capacitors with lowest frequency dispersion,Vfbshift and Ditvalues were fabricated using low oxygen partial pressure oxidation of 1150°C for 30 min.Hence,the thickness of thin SiO2layer has great influence on Al2O3/SiO2/4H-Si C MOS devices,a SiO2layer with thinner or thicker thickness will result in poorer electrical performance.In conclusion,Al2O3/SiO2gate stack is a good choice for 4H-Si C MOS devices.The process condition of thin SiO2layer has significant effect on the performance of MOS capacitor.Low oxygen partial pressure and high temperature oxidation method points to effective solutions to produce high quality SiO2layer.However,the optimal fabrication process and reliability of Si C MOSFET devices based on this structure still need to be further studied.
Keywords/Search Tags:4H-SiC, MOS devices, interface traps, thermal oxidation, low oxygen partial pressure
PDF Full Text Request
Related items