A Micromagnetic Simulation Of Spin Logic Memory Device

The discovery of giant magnetoresistance effect(GMR)has led to tremendous progress in magnetic memory technologies.Magnetization based information devices have remarkable advantages such as non-volatility,high write speed(3–30 ns),high density and low consumption(a few tens of f J/write).Among these techniques,magnetic random access memory(MRAM)has great potential for further applications,which is based on the magnetic tunnel junction(MTJ).The miniaturization of devices has always been a key issue in the field of integrated circuits.In the past few decades,Moore's Law has dominated the process of miniaturization of semiconductor devices.But today,Moore's Law is about to come to an end.If the field of integrated circuits wants to develop further,it must break through the limitations of Moore's Law from a new perspective.Different from semiconductor materials,silicon atoms are used as information carriers.In spin logic devices,it uses spin electrons as information carriers.Obviously the number of electrons is much greater than the number of atoms.In this paper,we focus on studying magnetic memory devices based on electron spin properties.The first type is magnetic random access memory(MRAM).At present,the device size can be scale down to 20 nm,but the fabrication process has to face many challenges,such as sample damage during the etching process and the sample tilt in the material deposition process.In this article The micro-magnetic simulation method is used to systematically study the effects of these two types of defects on the performance of the device.The second type is race track memory,which works based on the spin-topological magnetic structure skyrmions.There have been many researches on skyrmions.This article focuses on one of its variants-bimerons.It has the same topological number as skyrmions and can also move forward steadily under the drive of current.This article details The trajectories of the bimerons under different driving currents are compared,which provides a reference for the design of the subsequent bimerons spin logic device.