Research On Magnetic Tunnel Junction Model And Spin-transfer Torque Magnetic Random Access Memory

With the rapid development of electron information technology, a universalmemory is strongly desired for next-generation memory, which would featurenonvolatility and an infinite number of write cycles at the same time. MagnetoresistiveRandom Access Memory(MRAM) is regarded as a good candidate for universalmemory and it features nonvolatility, infinite endurance, high speed, great scalabilityand compatibility to CMOS process. This dissertation is mainly concerned with themodel of Magnetic Tunnel Junction and the design of Spin-Transfer TorqueMagnetoresistive Random Access Memory (STT-MRAM). The author’s majorcontributions are outlined as follows:1. Magnetic Tunnel Junctions(MTJs) have been studied. Magnetic TunnelingJunction is the memory device of Spin-Transfer Torque Magnetoresistive RandomAccess Memory. A compact model of the MTJ is presented, which exhibits the besttunnel magnetoresistance ratio and switching performance. This compact modelintegrats the physical models of static, dynamic and stochastic behaviors. And themixed simulation based on65nm technology node of a MTJ driven circuit validates itsrelevance and efficientcy for MTJ/CMOS memory.2. The writing driven circuits of MTJ memory device for STT-MRAM have beenstudied. The switching method of STT-MRAM is the Spin-Transfer Torque. Thewriting driven circuit provides a low bi-directional current (Iwrite) passing through theMTJ. Firstly, a writing circuit with low supply voltage is proposed to decrease powerconsumption. Unlike the conventional writing circuit, different column selected gatesare used respectively in the writing and reading operations，which decrease the numberof switch device. Therefore, the voltage could be reduced with one same write current.Secondly, a optimized self-enabled switching circuit for STT-MRAM is proposed byusing the stochastic switching operation of STT, which improves the power-efficientwriting and the whole lifetime of MTJ because of the shortened switching duration andthe reduced switching number.3. The sensing circuits of MTJ memory device for STT-MRAM have been studied.The reading operation of STT-MRAM is to pass low current (Iread) to detect theresistance difference between RAPand RP, and then to compare with the current (Ireadref)passing through the reference cell. An ultra-fast sense amplifier (SA) translates this comparison into logic level. The novel reference cell is proposed,which uses a pallel MTJ,This novel reference cell improves the degree of immunity against disturbance.4. A Spin-Transfer Torque Magnetoresistive Random Access Memory has beenstudied. Based on the study of the writing/reading circuits, a16Kbit STT-MRAM hasbeen designed with low power technology, including the memory cell array andperipheral circuits. The simulations and calculations show that the designedSTT-MRAM can implement the function of column selecting clearly.