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Secure Scan Structure Design Based On Automatic Test Control Unit

Posted on:2022-10-10Degree:MasterType:Thesis
Country:ChinaCandidate:Z DengFull Text:PDF
GTID:2518306608997699Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
In the information age when big data and Internet of Things become the focus of the industry and occupy the public's view,the information interaction between users or devices has become particularly important,and how to ensure the security of information transmission has also become a problem that cannot be ignored.In order to ensure good confidentiality of communication and prevent malicious theft and tampering of communication data by users who do not have access permissions,it is one of the best choices to encrypt information with encryption chip during communication to ensure security.As predicted by Moore's law,the number of transistors in an integrated circuit increases as the size decreases.Although this promotes the performance of the integrated circuit to improve rapidly,at the same time causes the test difficulty of the chip to increase greatly.The probability of chip failure during production increases with the rise of chip integration,so that the traditional probe test method is very difficult.The scan chain design,which can achieve excellent controllability and observability with low overhead,fills the gap of chip test design and makes most chips adopt this design.But since then,research has found that while the scan chain provides great convenience,it also brings security vulnerabilities.It makes it possible for the attacker to break the encryption chip by scan chain to obtain information.Therefore,the design of scan chain structure which can guarantee both security and testability becomes an urgent problem to be solved.In order to solve the above problems,this paper proposes a scanning design based on automatic test control unit.Compared to the original scan chain,this design adds an aided reset module,a key isolating module and an automatic test control unit.The aided reset module empties the data in the scan chain when the chip working mode is switched to prevent the middle data leakage of the encryption chip.In the test mode,the key isolating module forbids loading the data related to original key into the scan chain to prevent the attacker from using the intermediate value obtained from the test mode to reverse the original key.Automatic test control unit is used to control the working mode of the two modules.At the same time,this paper also proposes an improved scan design based on automatic test control unit to solve the shortcomings of the above design which cannot carry out online test and verify the function of the key generation circuit.In this design,a user authentication module is added on the basis of the original design.The user needs to input the correct password to make the output of the selected scan cell be high,the aided reset module and key isolating module will be disabled for normal testing.Otherwise,only partial testing can be done.The two designs proposed in this paper not only retain the excellent controllability and observability of scan chain design,but also keep the chip away from key-leakage.
Keywords/Search Tags:encryption chip, Design For Test(DFT), Attack based on Scan design, Hardware Security
PDF Full Text Request
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