Research And Design Of Broadband ESD Protection Circuit Incorporating On-chip Multilayer Inductors

With the continuous progress of communication technology and the development of 5G technology,the process size of integrated circuits continues to shrink,and the reliability of integrated circuits is becoming more and more important.Electro-Static Discharge(ESD)has become a key consideration in integrated circuit design.Especially for the design of electrostatic protection in high-speed and radio frequency circuits,the parasitic parameter effects of devices and circuits will inevitably have a serious impact on high-speed and radio frequency signals.The signal loss caused by ESD protection devices and circuits has been very significant.This article focuses on the electrostatic protection of high-speed,radio frequency integrated circuits,from the perspective of ESD protection principle analysis,ESD circuit protection structure improvement,and protection device model structure establishment,focusing on the difficulties of radio frequency integrated circuit electrostatic protection and how to ensure the robustness of ESD.To improve the performance of high-speed and radio frequency circuits,how to effectively reduce the area occupied by the chip while considering the area occupied by the chip.Based on 0.18?m CMOS integrated circuit technology,this paper designs a broadband ESD protection circuit incorporating on-chip multi-layer spiral inductors,which is suitable for ESD protection of high-speed and radio frequency circuits.The chip area occupied by the circuit is only 54?m×63?m.The ES620 series portable TLP ? curve test system was used for ESD test verification,and Keysight N5247A and RF probe station were used for two-port S-parameter measurement The results show that the designed ESD protection circuit can achieve a bandwidth of about 30 GHz,and the impedance matching below 40 GHz is maintained below-20 dB.The measured TLP and VF-TLP currents reached 2.26A and 6.26A,respectively,indicating that the circuit has high ESD robustness.According to the TLP and HBM test standards,it fully meets the conventional electrostatic protection requirements for integrated circuits.In this paper,the broadband ESD protection circuit designed for high-speed and radio frequency circuits has good ESD robustness and bandwidth characteristics.It uses a three-dimensional multilayer spiral inductor structure and proposes a more effective solution to improve the utilization of chip area.