Research On Memory Controllers' Placement Method For NoC Based On Multi-objective Optimization

During the era of big data,the amount of data processed by computer systems has exploded,and the gradual maturity of Network-on-Chip(No C)and many-core systems has alleviated the performance problems of system.However,as many-core systems have been greatly improved in terms of computing and communication,the frequency of these cores accessing memory will also increase.If we do not optimize System architecture related to memory access services,someday the memory bandwidth cannot match the huge data demand of the cores.Increasing the number of memory controllers on No C can be seen as a way to increase bandwidth.However,with the gradual increase number of cores,under the premise of meeting the pin requirements of cores,the pin resources that can be allocated to the memory controller are insufficient,resulting in that the number of memory controllers is far less than the number of cores.The location of the memory controllers on chip will affect the distribution of traffic,and peformance parameters of No C will change accordingly,ultimately affecting the performance of the entire system.Therefore,discussing the optimal placement of the memory controllers on No C is the focus of the thesis.There are some deficiencies in the existing methods.Some methods integrate simulation into evaluation,resulting in high time complexity and low scalability during iteration.Some methods convert multiple goals into a single goal to solve the problem,which greatly reduces the diversity of solutions.The multi-objective optimization is suitable to solve the problem of MC placement.But the previous research avoids multi-objective optimization because it is difficult to screen an optimal solution.This article overcomes these problems,we take network delay as the optimization goal and take multi-objective optimization as the framework in the field of memory controller placement optimization for the first time to model the problem.And then we search for the optimal solution set to ensure the integrity of the optimal solution.The integrated memory controller structure and the independent memory controller structure are two different forms of memory controllers on No C.The thesis optimizes these two structures respectively.The thesis takes minimizing the number of network hops and minimizing network congestion as the optimization goals,and designs three objective functions.The mutual exclusion of each objective function is verified,and then the optimal solution set under various network scales and network configurations is obtained by the NSGA-II algorithm.After obtaining the optimal solution set of the problem,the thesis verifies the relationship between the optimal placement and the traffic pattern first.Different traffic patterns correspond to different optimal placement.Then,the injection rate segmentation method and the golden section method are used.The optimal solution is intensively screened to obtain the optimal placement corresponding to each application.Through simulation,the performance difference between the integrated memory controller structure and the independent memory controller structure under various placement modes is analyzed,and the superiority of the obtained optimal placement compared with the traditional placement is analyzed.At the same time,the defects of the previous optimal placement based on ideal throughput are explained.In the thesis,an optimization framework for memory controller placement optimization is built,and the method has good scalability.