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Research And Implementation On Design And Verification Method Of I2S In SoC

Posted on:2022-10-21Degree:MasterType:Thesis
Country:ChinaCandidate:H YangFull Text:PDF
GTID:2518306605470044Subject:Master of Engineering
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In the modern world,with the rapid development of 5G,the mode of “AI+Io T” has also achieved rapid development.In the hundreds of millions of Io T devices,low-end SoC occupy a very large market share.As a common audio peripheral interface,I2 S has been widely applied to many fields.Especially in today's era of the popularity of short distance communication devices,applications with wireless communication function chips such as WIFI and Bluetooth have built a huge Internet of Io T system.For IC design companies,it is particularly important to develop an I2 S interface controller that conforms to the protocol and is highly compatible,and to use an efficient method to complete the verification work.Based on the above requirements,this paper proposes to design an I2 S interface controller with strong compatibility to meet the Io T chip market's demand for the use of I2 S interface.In the design process,on the premise of meeting the application requirements of the system,supporting more working modes as the basis,I2 S configuration parameters as the basic control information to implement the I2 S module that supporting under DMA/interrupt control.The verification work of I2 S is completed by using UVM verification methodology and C code test cases.Building a complete and efficient verification platform suitable for design,and writing comprehensive test cases to carry out functional verification.In the process of verification,the components for unit-level verification are constructed based on the partitioning of verification components by UVM verification methodology.Generating test configuration information,running test cases,and caching data transfer results by utilizing the advantages of the System Verilog language and UVM verification methodologies,such as interface communication,random sequence generation,queues,and factory mechanisms.Maintaining the open source I2 S model to meet the DUT's opposite end device mode requirements,and modifying some internal logic to make it more efficient for unit-level verification.The key simulation waveforms such as interface are emphatically checked and boundary cases based on working scenarios and asynchronous communication are constructed to make the verification results more convergent.Meanwhile,using the test cases written in C language to complete the system level verification,CPU can participate in the process of I2 S work to make the verification environment closer to the real working situation.The unit-level and system-level verification are in charge of different aspects,which can not only ensure the correct function of the module itself,but also ensure the correct work in the system,and make the verification efficiency higher,the verification results converge better.Finally,the FPGA prototype verification of I2 S module was completed by building FPGA platform,and the third-party chip was used for auxiliary testing to simulate the real working environment of the module,and the test results basically meet the design expectations.According to the reasonable evaluation of the verification results,the code coverage reached about 98% on average,and the functional coverage reached 100%.The results show that the designed I2 S module has the correct function and covers all the design functional requirements.The results of FPGA prototype verification are as expected,and the audio effect of actual playback meets the requirements.The whole verification work was comprehensive and the result analysis was as expected.
Keywords/Search Tags:SoC, I2S Bus, UVM verification methodology, FPGA prototype verification
PDF Full Text Request
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