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Design And Implementation Of High Speed Switch Fabric And Scheduling Algorithm Based On Crosspoint Buffer

Posted on:2018-10-20Degree:MasterType:Thesis
Country:ChinaCandidate:Y P ZhouFull Text:PDF
GTID:2348330563451246Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
The rapid growth of the Internet and the rapid increase in the size of the network makes the network traffic exponentially,high performance computing,data center,network broadcast,AR(augmented reality)and future VR(virtual reality)have a higher demand for network bandwidth,throughput of exchange are put forward,put forward new requirements to exchange performance the equipment of the existing network.High speed switch fabric has been widely used in many aspects,such as high performance switching chip design,internal interconnection of integrated circuits,memory control,communication control and custom protocols.This paper based on "XX RapidIO high speed serial switch chip" key projects to support,according to the demand analysis,project design,project implementation process,completed the switch fabric of "Combmed Input-queuing Crosspoint-queuing and Output-queuing Crossbar" design,scheduling algorithm design,RTL simulation,UVM verification,FPGA verification DC and logic synthesis etc.In this paper,the CICOQ switch fabric is 8x8,the data bit width is 32 bit,and the bandwidth is 128 Gbps.Support unicast,multicast and broadcast mode,DUT code can be changed to 16x16 or other scale according to actual needs,can be used to build a small switching network and integrated circuit module data exchange between,with a certain degree of reusability and engineering reference value.The main work of this paper is as follows:1.Based on the analysis and comparison of the crossbar based switch fabrics,the CICOQ switch fabric is designed and implemented on the basis of the CICQ switch fabric,and the key parameters of the cross point buffer and VOQ buffer are determined.2.The scheduling algorithm of buffered crossbar is studied,the RR_RR scheduling algorithm is based on the design of the input and output of the scheduling algorithms of CICOQ exchange,scheduling algorithm for delay of 10 clock cycles.3.The Universal Verification Methodology is researched and the UVM verification platform of CICOQ switch structure is built.The CICOQ is fully verified by UVM verification platform in VCS software environment.The result shows that the design function is normal,and the code coverage reaches Can explain 100%.4.The CICOQ switch fabric is verified by Xilinx's Vivado software environment and the development board of the Virtex-7 series XC7VX690 T chip.The verification results show that the CICOQ switch structure can work normally in the hardware environment.5.The CICOQ exchange structure has completed the logic synthesis by DC synthesis tool,in the 65 nm process at room temperature working environment,the system maximum operating frequency of 500 MHz,an area of 381878,power consumption of 123532 mW,the minimum delay of 20 ns.
Keywords/Search Tags:crossbar, scheduling algorithm, UVM verification methodology, FPGA prototype verification, DC synthesis
PDF Full Text Request
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