Design And Verification Of UART IP Core With SLIP Protocol Based On SoC

With the continuous development of VLSI design technology and the continuous advancement of microelectronic process technology,the way to integrate the key components of the system onto the chip becomes more and more important.This approach has promoted the formation of IC standardization,and the high integration and uniform standardization of the IC industry has also transformed integrated circuits into system-onchip(SoC).As the basic design unit of SoC,IP core can simplify system design and is the basis of SoC design.It is becoming more and more important in the development of SoC.UART(Universal Asynchronous Receiver/Transmitter)is one of the asynchronous communication serial bus interfaces.Due to its lower bandwidth,lower speed,and lower cost,it can be used in long-distance serial interfaces.The SLIP(Serial Line IP)protocol is a simple form of encapsulating IP datagrams on a serial line.It is suitable for the RS-232 serial port and high-speed modem of every computer in the family to access the Internet.Although there are a variety of serial communication interface IP cores available on the market,almost all of these IP cores come from foreign IP manufacturers or EDA manufacturers,and the cost is relatively high.Therefore,the self-developed serial universal bus interface IP can be used.Reduce costs,but also has practical application significance.For verification,UVM has been sought after by many companies once it was born.It not only has register solutions,but also embeds various reusable mechanisms,and is gradually becoming the mainstream verification test methodology in the industry.This article focuses on the realization of a UART IP core with SLIP protocol in a SoC Wi Fi chip.First,on the basis of meeting the basic requirements of the UART,the UART module is divided in a top-down manner,and the SLIP protocol is implemented by hardware and integrated into the UART IP core;then,the simulation verification is extracted according to the functional requirements of the UART module The function points of the system and the test cases required for functional simulation are written.The UVM verification method is used to complete the construction of the UART unit-level verification platform.The IP core is embedded in the SoC and the test cases are written in C language and the CPU executes the operating instructions A system-level simulation verification of the UART IP core.The analysis of code coverage and function coverage shows that the system-level and unit-level code coverage is above 95%,and the functional coverage is 100%,which has reached the design expectations.Finally,in order to ensure the design timing and function Correctness,simulation verification after placement and routing of the UART IP core and FPGA prototype verification that can simulate real-scene applications are also performed.The simulation results show that the designed UART IP can normally complete the transmission of UART data and SLIP data,which satisfies The basic functional requirements of the UART IP core are solved.