High Precision Floating Point Exponent And Logarithmic Function Hardware Design

In recent years,with the explosive growth of big data,the requirements for data processing are getting higher and higher?There is a higher demand in terms of speed and accuracy.In the operation of data,the transcendental function has been paid attention to by many scholars because of the complexity of its calculation.Nowadays,the application range of transcendental functions is more and more extensive.In image and speech processing,there are a large number of exponential,logarithmic and trigonometric functions.The speed and precision of these functions directly affect the performance of the system.In scientific computing programs,3D graphics applications,and system performance evaluation programs,there are also a large number of transcendental function computing units.The rate and accuracy of these transcendental functions are also affected by the performance of these programs.How to perform high-speed processing on these data operations and improve the accuracy of function operations has become a hot research topic.The hardware design of the exponential and logarithmic functions was carried out in this project.For the improvement of the speed and precision of the exponential and logarithmic functions,the pipeline architecture of the CORDIC algorithm is often used in the hardware architecture,and the increase of the iteration level is used to improve the precision.However,due to the convergence factor in the algorithm,the computational domain of the function operation is very narrow,which is not satisfactory for the current massive data processing.In view of the situation that the computing domain is too narrow,this paper proposes a new hardware design scheme to complete the extension of the function operation domain.In the design of exponential and logarithmic function schemes,mainly relying on the characteristics of floating-point numbers and functions,the computational domain is improved by the method derived by mathematical principle.The operation of the logarithmic function is mainly divided into small-scale logarithmic operations and multiplication operations.For the first time,the operation of the exponential function directly implements the hardware implementation of the exponential part and the mantissa part of the result of the exponential function,which solves the situation that the intermediate data is prone to overflow in the function calculation.All logarithmic function calculations for four-precision floating-point numbers can be satisfied on the computational domain,and the exponential function can perform(-8192,8192)exponential operations.At the same time,in view of the precision requirements of the function operation,the four-precision floating-point number is taken as the input for the first time,and the precision of the function operation is improved by increasing the consumption of the storage resource.Designed according to the proposed new scheme in the hardware architecture,mainly including function calculation module,timing control module and circuit overall control module.In order to improve the precision of the function operation,the data processing of the mantissa part of the floating-point number input ensures that all the mantissas enter the function operation module,and the 67-stage flow CORDIC algorithm is used in the calculation for small-scale exponential and logarithmic operations.Because the number of iterations in the algorithm is many,the algorithm module is optimized to save hardware resource consumption.Finally,the error analysis of the function operation in the hardware design is carried out,and the input and output are converted into decimal and the result obtained by the calculator is compared to complete the error analysis.The accuracy of the exponential and logarithmic functions in data operations is very high,meeting the high precision requirements of current image and speech processing.