Research On Realization Of Low Power Consumption Security Lightweight Cryptography Algorithm

With the advent of the information age,electronic information technology is becoming more and more mature,and the Internet of Things(Io T)technology has been widely used in various fields of social life.While the Internet of Things makes life more convenient and fast,it also lays down many hidden security risks.Embedded devices are an important medium for Io T application systems.Most of them are battery-powered and have strict requirements on standby time,and have strict limits on power consumption.Based on the above,the research work on the safe and lightweight cryptographic algorithm that adapts to the extreme power consumption environment is of great significance.Magnetic tunnel junction(MTJ)is a new type of spin electronic device,which has good performances such as non-volatile,high-speed reading and writing data,and is easy to integrate into CMOS circuits.In addition,the low leakage power characteristics of the magnetic tunnel junction make it have broad prospects in the circuit design research of low-power cryptographic algorithms.Therefore,this paper uses the MTJ/CMOS hybrid architecture to design a lightweight cryptographic algorithm circuit,and explores an implementation scheme that can further reduce the power consumption of the circuit without weakening the circuit's ability to resist power attack.This research has farreaching significance for the development of lightweight cryptographic algorithms.As a mainstream password cracking method,power consumption analysis attacks pose a great threat to the security of cryptographic algorithms.In order to quickly evaluate the security of cryptographic chips during the chip design stage,the paper builds gatelevel and circuit-level power collection and attack platforms,respectively.At the gate level,a power collection and attack platform is built based on the Prime Time PX simulation tool;at the circuit level,a circuit level power collection and attack platform is built based on the Candence Spectre simulation tool.After that,this paper selects the lightweight block cipher algorithm PRESENT as the experimental object,and uses Correlation Power Analysis(CPA)attack as the research method.The cipher algorithm is implemented from the algorithm level and the circuit level,and a variety of Anti-power attack protection scheme.The algorithm-level protection scheme uses a random value mask scheme.At the circuit level,the protection circuit of PRESENT cryptographic algorithm is designed by combining MTJ and CMOS.Use gate-level power collection and attack platforms to evaluate the security of algorithmlevel protection schemes.Use circuit-level power collection and attack platforms to evaluate the security of circuit-level protection schemes.Experiments show that,without protective measures,the key information of the PRESENT cryptographic algorithm,whether implemented in parallel or serially,can be easily cracked by attacks and has poor security.Although the random value mask protection scheme has certain protection capabilities,the power consumption cost is high,and the MTJ/CMOS hybrid circuit structure protection scheme can effectively resist CPA attacks.In order to improve the security of the cryptographic algorithm,the power consumption cost increases limited.Studies have shown that the MTJ/CMOS hybrid circuit protection scheme using a dual-track lookup table structure reduces energy consumption by 19% compared to the standard CMOS circuit implementation scheme of the same structure,which has certain certainness for future research on secure and lightweight cryptographic algorithms for your reference.