Space-based Infrared Dim Target Detection Algorithm And FPGA Implementation

Space-based infrared dim target detection is the process of discovering the target of interest in the satellite-based infrared camera image sequence,which plays important roles in forest fire disaster warning,space target surveillance and post-disaster search and rescue.Under the circumstances of long detection distance,wide imaging scene and complex background,target detection is difficult due to the target features in terms of large energy attenuation,small imaging area,shapeless feature and low background signal-to-noise ratio.Meanwhile,the limited computational resources available on the satellite-based platform greatly limit the deployed algorithm complexity,so how to design low-complexity algorithms and efficient computational architecture is the main difficulty in realizing real-time detection of space-based target.This thesis addresses the space-based infrared dim target detection algorithm and its FPGA implementation.On the level of dim target detection algorithm,the characteristics of space-based infrared dim target image are analyzed,and DLCM（Double-layer Local Contrast Measure）is selected as the basic algorithm.In order to solve the problem of high false alarm rate with regard to DLCM in low SNR image,since DLCM algorithm only uses single-frame image information,a detection idea consisting single-frame pre-processing and multi-frame association is presented,moreover,an infrared sequence image dim target detection algorithm DLCMK is proposed based on DLCM-KALAMN filter.The experimental results show that the false alarm rate decreases from 2×10^-3 in DLCM to 5×10^-5 in DLCMK with 96%detection rate,and achieves a good banlance between high detection rate and low false alarm rate.On the FPGA real-time implementation level,comprehensively considering the requirements of low resource consumption and high real-time performance of satellite-based applications along with the computational flow and characteristics of the DLCMK algorithm,this thesis designs an efficient computational architecture of“global pipelining and local parallelism”based on FPGA,which breaks the bottleneck of critical path delay such as image pre-processing,connected components labelling and multi-frame association,also improves the pixel throughput.The experimental results show that the pixel throughput of the computational architecture is up to 79.8 Mpixel/s,and the processing delay is less than 1ms for images with the resolution of 512×512 and the frame rate of 25Hz,and the power consumption is less than 1.1W,which meets the demand for real-time detection of dim targets under resource-constrained conditions for satellite-based applications.