The Design Of Adaptive Dead-zone Control Circuit For Haif-bridge Driver ICs

The half-bridge driver chip has the advantages of high reliability,high integration and intelligence,is widely used in motor driving and switching power supply.The dead time control technology is one of the key technologies of the halfbridge driver chip.If the dead time is too long,it will cause the conduction loss of the body diode,and if it is too short,it will increase the risk of power device shoot-through.Especially in high-frequency applications,when the input signal of the halfbridge driver chip is a narrow pulse,the power device is prone to shoot-through.Therefore,it is of great significance to study the adaptive dead zone control circuit of the half-bridge driver chip.This thesis first introduces the half-bridge driver chip and the research significance of the adaptive dead zone control circuit,then analyzes the delay characteristics and reliability of the dead zone control circuit,points out that when the chip has a narrow pulse input,the dead time feedback delay time is too large,which causes the high-and low-side power transistor to pass through.Aiming at this problem,this thesis designs a new type of anti-through adaptive dead time control circuit,which consists of a dead time detection circuit,a high-reliability low-delay down level shift circuit,a narrow pulse antithrough circuit,and a feedforward control circuit.According to the output signal of the half-bridge driver chip,the dead time control circuit automatically adjusts the dead time to adapt to the work under different load conditions.The shoot-through problem of the high-and low-side output of the half-bridge driver chip is eliminated by the narrow pulse anti-through control circuit and the feedforward control circuit.The high-side minimum supply voltage is reduced by a high-reliability low-delay down level shift circuit.In the end,the dead time is optimized,and the problem of short-time power transistor under narrow pulse input is solved,ensure the safety and reliability of half-bridge driver chips in high-frequency application scenarios.This thesis is based on the 0.25?m 60 V BCD process for simulation and tape-out.The tape test results show that at 15 V operating voltage,40 V power voltage and 1MHz operating frequency,the dead time automatically changes according to the load conditions.The high-side typical dead time is 27.4ns,the low-side typical dead time is 24.3ns,and the high side the minimum power supply voltage can be as low as 2.2V,the minimum input pulse width is 28 ns,the quiescent current is 162?A,and all specifications meet the design specifications.