Research On Space Time Adaptive Algorithm Based On FPGA

After decades of development,space-time adaptive algorithm has been relatively perfect in principle.At present,the algorithm implementation architecture is mainly based on DSP,and the data preprocessing is assisted by field programmable gate array(FPGA).In recent years,thanks to the rapid development of the integrated circuit industry,the FPGA manufacturing process is more and more mature,the computing performance is more and more strong,and the price has declined.The architecture with FPGA as the core has become a new research hotspot.Combined with the actual project requirements,this paper deeply studies the space-time adaptive algorithm with FPGA as the core architecture,designs the core adaptive weight algorithm in detail,and carries out the simulation verification.The main research contents are as follows:1)A new implementation structure of Cholesky decomposition algorithm on FPGA is designed.Compared with the Cholesky decomposition algorithm directly mapped on FPGA,the new architecture has better parallel performance and stronger configurable performance.Through parameter configuration and module re instantiation,the order of calculation matrix can be easily changed.In the new algorithm,the square root reciprocal open method is introduced,which reduces the number of iterations and improves the speed of calculation.2)An adaptive weight solution method based on Cholesky decomposition for FPGA is designed.The principle of adaptive weight algorithm based on Cholesky decomposition is studied.By designing an equation group calculation module and normalization calculation module based on pipeline structure,the fast solution of adaptive weight is realized.The corresponding algorithm and structure are simulated and verified on the self-developed xc7k325 t platform,which shows the feasibility and correctness of the design method.