Research And Design Of White Rabbit Time Synchronization Technology Based On Zynq

High-precision time synchronization in the communications field means high-speed data transmission.With the construction of 5G base stations,the popularization of 5G networks,and the development of quantum communications,the demand for time synchronization has reached the nanosecond or sub-nanosecond level.Although the existing Precision Time Synchronization Protocol(PTP)can achieve sub-microsecond accuracy,the PTP protocol obviously cannot meet the requirements for scientific research fields where time synchronization needs to reach tens of nanoseconds or sub-nanoseconds.Therefore,this paper proposes and implements a sub-nanosecond time synchronization technology based on the ZYNQ platform-White Rabbit technology(WR).WR technology is an extension of PTP technology.It combines synchronous Ethernet and digital double mixing technology.Through continuous high-precision measurement and calibration of the asymmetric delay between the master and slave clock links,the clock synchronization accuracy is based on PTP technology.Increase by an order of magnitude to reach the sub-nanosecond level.The ZYNQ technology platform is a fully programmable system-on-chip combining ARM and FPGA;real-time WR technology stack can be implemented in PL(Programmable Logic)when implementing WR technology,and in a hardened ARM dual-core processing system(PS)The embedded Linux system is running in.The main design work is as follows:1.After studying the principles of PTP protocol,synchronous Ethernet technology and digital double-mixing technology,the link model of WR technology is established,and the asymmetry parameters of link delay are calculated and deduced;2.Choose Zynq XC7Z030 chip as the main control chip,use hardware description language(VHDL)in PL to realize the key technology of physical gateway and WRPC,and combine the programmable logic architecture of AXI bus to realize the IP core communication between PS and PL;3.Transplant the Linux system and WRPC driver in PS,develop and implement the upper layer protocol of WR technology and related custom logic modules under Linux system;4.Finally,the pulse per second signal(PPS)is output through the master-slave clock module,and the time difference between the master-slave clock synchronization is accurately tested within 1ns,and the sub-nanosecond time synchronization accuracy is realized.In summary,this article uses the ZYNQ ARM+FPGA fully programmable chip architecture to achieve sub-nanosecond time synchronization,avoiding sacrificing FPGA logic resources for the realization of the upper layer protocol of WR technology,and providing for the future expansion of the functional requirements of the sub-nanosecond time synchronization system A new design scheme.