Research On Calibration Method Of High Accuracy Time Base Based On FPGA

With the rapid development of communication and Internet of Things,the requirements for time precision of related applications hava been continuously improved,especially for Internet of Vehicles and communcation network equipment.The concept of Internet of Vehicles was first proposed by General Motors at the Shanghai World Expo,referring to the interaction between cars and cars,cars and roads,cars and people,cars and sensors,sharing information,and establishing a dynamic mobile communication system.To achieve outstanding performance,Internet of Vehicles has continuously improved the requirement for the time synchronization accuracy among various nodes in system,but traditional NTP protocols cannot meet the requirements.In the field of communications,communication network equipment need to perform control operations and collect relevant information on the target,and perform centralized processing and transmiting.This makes the amount of data becomes larger and larger,so 100 M Ethernet has been difficult to meet the requirements of data transmission.IEEE802.1AS is a precision clock protocol standard and can be used in Gigabit Ethernet interfaces.This standard adopts g PTP protocol and can achieve sub-microsecond accuracy.This paper analyzes the IEEE802.1AS protocol standard,studies the effect of soft and hardware timestamping on the time synchronization performance,and analyzes in detail the design ideas of the timestamp module and the RTC(real-time clock)module.In the timestamp module,the paper puts forward the solution of the hardware timestamp to solve the problem that the software timestamp causes a large time error in the time synchronization,and developed the IP core as hardware support.In real-time clock module,the solution of digital phase-locked and Frequency Compensation Algorithm is proposed for the instability of the clock source and the deviation of the master-slave crystal oscillator.The paper uses Modelsim to verify the functions of the two modules and introduces the methods for how to connect among modules,including the conversion of bus protocols,the conversion of data width,etc.Based on the current existing hardware support for g PTP protocol,this paper proposes a scheme based on Zynq-7000 FPGA chip as a hardware platform,without external PHY chip and NI at the PL(Programmable Logic).To improve synchronization accuracy,a IP core supporting hardware timestamping was designed to intergrate into the system.In terms of software,drivers can read and write registers based on the AXI bus.The written drivers are compiled into Linux kernels with loadable modules,enabling the kernel to support hardware timestamp.At the user level,the protocol engine is transplanted so that it can run on the Zynq-7000 ARM processor.This paper completes the design and implementation of hardware system supporting g PTP protocol.In the final testing process,the time synchronization function was tested and statistics were taken for the g PTP packets and clock deviations.The experiment verifies that the system has realized the support for hardware timestamp,and the synchronization accuracy has also been improved,completing the basic functions.