Research And Design Of Rf Power Amplifier For New Generation WLAN

Wireless Local Area Network(WLAN)technology has been more and more widely used with the rapid development of communication technology,and equipment has become more and more Intelligent.The new generation of WLAN standards will start a certification program in 2019.The new standard adds key technologies such as OFDMA and MU-MIMO to achieve faster information throughput and greater user capacity in a limited frequency band,while using complex modulation technology(1024QAM)to achieve high spectrum utilization and lower network delay.But make the modulated signal have a higher peak-to-average ratio.The signal with high peak-to-average ratio causes the Power Amplifier(PA)to enter the saturation zone faster,resulting in a shorter transmission distance of the LAN signal and poor transmission quality.In the new generation WLAN standard Physical Layer protocol,Transmitter needs higher linearity to complete the signal's distortion-free transmission,so it is of great significance to research and design the PA applied to the new generation of WLAN.This dissertation first introduces the basic models and characteristics of semiconductor devices.Then introduces the basic theory of PA,including the performance indicators of PA and the Classes of PA.At the same time,it focuses on the nonlinear characteristics of amplifiers,and discusses the use of power back-off,negative feedback,and feedforward.And predistortion and other linearization methods to improve the linearity of the PA.Finally,research and design a radio frequency PA that can be used in Wireless LAN smart terminals,which meets the linearity requirements of the new generation of LAN standards,and the operating frequency is 5.15GHz?5.85 GHz.Use the architecture of cascaded three-stage common-emitter amplifier circuit to increase the gain.The second-stage circuit is not only used as a driving circuit to drive the high-power output of the third-stage circuit,but also can form a pre-distortion circuit to perform non-linearity in the third stage.make up.The output matching network with adaptive linear bias circuit and harmonic suppression is adopted to improve the linearity and power output capability of the power amplifier.This design first uses ADS to complete the simulation of the schematic diagram and Virtuoso for layout design,and then conducts joint electromagnetic simulation of the layout and the schematic diagram,and iteratively optimizes until the design has achieved.Finally,the designed chip is taped out,and the test board is designed to verify whether PA performance meets the standard requirements.The final test results of the PA are as follows: the saturated output power of the PA is28.2d Bm,and the S21 is 29.5d B.When the output power is 20 d Bm,the power added efficiency is 6.5%,and when the test signal is 80 M 256QAM,the EVM is below-35 d B,which basically meets the design specifications and the requirements of the protocol PHY for transmitter linearity,which proves the correctness of the design method and feasibility.