Fan-out Panel-level Package Die Shift Analysis And Improvement

At present,the semiconductor packaging process is mainly for wafer-level packaging,due to the push in consumer electronics,miniaturization,thinning,cost-effective packaging requires the use of economic panel size substrate as a carrier to reduce the overall cost.However,as the package size increases,the problem of die shift also turns out to be more and more prominent,which can seriously reduce the quality of the rewiring layer production and lower the yield of fan-out panel-level packages.How to reduce die shift has become a hot topic in fan-out panel-level packaging.Currently,fan-out panel-level packages have a larger package size compared to wafer-level packages,and the methods used for wafer-level packages to reduce die shift cannot meet the process requirements of fan-out panel-level packages.During the packaging process,the die shift is mainly affected by three factors: die flow,carrier panel heating and expansion,and post-curing shrinkage,where die flow mainly causes thrust on the die during the filling stage of the plastic sealer,while carrier panel heating and expansion and post-curing shrinkage mainly cause the change of the die position.In this paper,a new method to reduce the chip drift in fan out board level packaging is proposed.The temporary adhesive is divided into blocks to reduce the size of the temporary adhesive,so as to reduce the chip position drift in the heating stage.At the same time,the powder plastic packaging material combined with compression molding technology is used to greatly reduce the die flow resistance,so as to reduce the chip drift caused by the filling stage of the plastic packaging material.The main research contents of this paper are as follows(1)According to the die shift detection equipment,establish the die shift data processing mathematical model,and at the same time,based on this mathematical model,develop the vector field analysis software of die shift based on Matlab software.(2)Establishing a simulation model of die shift in fan-out panel-level package by ANSYS WORKBENCH software,and conducting finite element simulation for carrier panel expansion and post-curing stages.The simulation results are compared with the actual process results to validate the model.Meanwhile,the relationship between key parameters such as die pitch and its thickness,thickness of plastic sealer and its coefficient of thermal expansion(CTE),CTE and modulus of elasticity of carrier panel,CTE of temporary bonding adhesive and die shift is investigated.(3)In order to reduce the chip drift caused by the heating expansion and post curing stage of the carrier in the fanout board level packaging process,the temporary adhesive is divided into blocks to reduce the size of the temporary adhesive,so as to reduce the chip drift in the heating stage.The simulation results show that the chip position drift during the heating stage can be greatly reduced by blocking the temporary adhesive.The simulation results show that the chip drift of the initial experimental group is 36.76?m,and the chip drift is 22.62?m,which is reduced by 14.14?m.The results show that the chip drift can be significantly reduced by blocking the temporary adhesive.