| Convolutional neural networks(CNN)have been widely used in deep learning applications,especially on power hungry GPUs.Recent efforts have shown that designing CNN hardware accelerators is a more energy-efficient solution.However,with the development of deep learning research,the number of advanced convolutional neural network parameters and the amount of calculation continue to increase,resulting in the difficulty of high computational power consumption and limited memory size when deploying neural networks.In order to reduce the amount of calculation,some studies have proposed a method to sparse CNN weights.During CNN training,the weights in the network that are less than a certain threshold are reset to zero or quantized to fewer bits.While reducing the weight bit-width,the accuracy of the network loss is limited.It means that a lower bit-width can be set in the computing core unit and memory when designing the accelerator,thereby reducing hardware overhead.However,because some critical calculations in neural network calculations require higher calculation accuracy,a single-precision design strategy will inevitably reduce the network accuracy.Thus,this paper proposes a convolutional neural network accelerator architecture with fine-grained mixed precision,which can run mixed-precision calculations simultaneously and assign appropriate arithmetic cores to operation with different precision requirements.This proposed architecture can achieve significant area and energy savings without accuracy compromise.Besides,this paper proposes a network retraining method based on the accelerator architecture,which can improve any CNN's computational efficiency without losing the accuracy of the network.Experimental results show that compared with the single-precision accelerator before deploying this architecture,the structure implemented on FPGA can reduce the weight storage and multiplier area by nearly half while reducing the computational power consumption by 17.7%. |
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