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The Research And Implementation Of 20Gbps High-Speed Link

Posted on:2022-05-25Degree:MasterType:Thesis
Country:ChinaCandidate:X H PanFull Text:PDF
GTID:2518306524983739Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
With the rapid development and advancement of science and technology,people's demand for communication speed and frequency is increasing year by year,so the research needs of ultra-high-speed data transmission links are becoming more and more urgent.Therefore,under the premise of ensuring the reliability of data transmission,in recent years,people have begun to increase the research on terahertz technology,trying to use terahertz waves to achieve high-speed wireless communication.The research content of this paper is as follows:In this paper,the application scenario of terahertz wave to ground point to point communication is analyzed and determined,and the design objective of high speed link is given.The Orthogonal Frequency Division Multiplexing(OFDM)modulation and demodulation scheme of the physical layer digital baseband signal is determined,and the OFDM technology is briefly introduced.Then,Quadrature Amplitude Modulation(QAM)of order 16 and 64 is analyzed and compared,and 64 QAM suitable for the link is selected.Low Density Parity Check Code(LDPC)encoding and decoding in baseband link were determined to improve the reliability of data transmission.The signal sampling rate of 10 GHz and the system effective transmission rate of 20 Gbps were set.In highspeed link key algorithm was introduced in detail,the physical channel estimation and equalization algorithm is introduced,through analysis and comparison to choose the Least squares(LS)fit this link further Square LS channel estimation algorithm and forced zero balance algorithm,and introduces several common channel codec algorithm,compared the respective advantages and disadvantages,In terms of coding,direct coding algorithm based on QC-LDPC code is selected,and in terms of decoding,min-sum(MS)algorithm is selected,and 64 QAM soft demodulation algorithm is also introduced.Finally,the approximate logarithmic likelihood ratio algorithm,which is most suitable for hardware implementation,is selected.Then,the baseband digital signal and data processing flow are simulated and verified.At first,the performance of the key modules is simulated,and then the whole baseband link is simulated to verify its performance.Then the hardware implementation of the overall link design is carried out,the structure of the transmitter and receiver of the link is designed and the flow of data processing is given.The mapping mode of OFDM parameters and subcarriers is described in detail,and the reason of using the mapping mode of mirror conjugate symmetric carrier is introduced,as well as the special pilot structure.The frame structure including 6-channel parallelization scheme is designed and realized,and the processing process of single-channel digital baseband signal is introduced in detail,and then the key modules at both ends of the transceiver are analyzed and designed.The Register Transformation Level(RTL)simulation results and resource utilization are given,and then the hardware realization of the transmitter and receiver on the board self-loop test,and the online logic analyzer is used to capture the signal and analyze the signal.Finally,the feasibility and correctness of the system design scheme are verified by analyzing whether the result of hardware realization meets the requirements of the data transmission rate of the link.
Keywords/Search Tags:High-speed link, OFDM, Parallelization, FPGA
PDF Full Text Request
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